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Revert "Guard opaque pointer changes"
This reverts commit b343a2b.
1 parent 6ea2f39 commit 6f96592

12 files changed

+152
-222
lines changed

‎llvm/include/llvm/IR/Intrinsics.td

Lines changed: 40 additions & 54 deletions
Original file line numberDiff line numberDiff line change
@@ -386,32 +386,21 @@ class LLVMAnyType<ValueType vt> : LLVMType<vt> {
386386
assert isAny, "LLVMAnyType.VT should have isOverloaded";
387387
}
388388

389-
class LLVMQualPointerType<LLVMType elty, int addrspace>
390-
: LLVMType<iPTR>{
391-
LLVMType ElTy = elty;
389+
class LLVMQualPointerType<int addrspace>
390+
: LLVMType<iPTR> {
392391
assert !and(!le(0, addrspace), !le(addrspace, 255)),
393392
"Address space exceeds 255";
394393

395-
// D63507: LLVMPointerType<llvm_any_ty>
396-
let isAny = elty.isAny;
397-
398-
let Sig = !listconcat(
394+
let Sig =
399395
!if(addrspace, [
400396
IIT_ANYPTR.Number,
401397
addrspace,
402398
], [
403399
IIT_PTR.Number,
404-
]),
405-
ElTy.Sig);
400+
]);
406401
}
407402

408-
class LLVMPointerType<LLVMType elty>
409-
: LLVMQualPointerType<elty, 0>;
410-
411-
class LLVMAnyPointerType<LLVMType elty>
412-
: LLVMAnyType<iPTRAny> {
413-
LLVMType ElTy = elty;
414-
403+
class LLVMAnyPointerType : LLVMAnyType<iPTRAny> {
415404
assert isAny, "iPTRAny should have isOverloaded";
416405
}
417406

@@ -499,16 +488,13 @@ def llvm_double_ty : LLVMType<f64>;
499488
def llvm_f80_ty : LLVMType<f80>;
500489
def llvm_f128_ty : LLVMType<f128>;
501490
def llvm_ppcf128_ty : LLVMType<ppcf128>;
502-
def llvm_ptr_ty : LLVMPointerType<llvm_i8_ty>; // i8*
503-
def llvm_ptrptr_ty : LLVMPointerType<llvm_ptr_ty>; // i8**
504-
def llvm_anyptr_ty : LLVMAnyPointerType<llvm_i8_ty>; // (space)i8*
505-
def llvm_empty_ty : LLVMType<OtherVT>; // { }
506-
def llvm_descriptor_ty : LLVMPointerType<llvm_empty_ty>; // { }*
507-
def llvm_metadata_ty : LLVMType<MetadataVT>; // !{...}
508-
def llvm_token_ty : LLVMType<token>; // token
491+
def llvm_ptr_ty : LLVMQualPointerType<0>; // ptr
492+
def llvm_anyptr_ty : LLVMAnyPointerType; // ptr addrspace(N)
493+
def llvm_empty_ty : LLVMType<OtherVT>; // { }
494+
def llvm_metadata_ty : LLVMType<MetadataVT>; // !{...}
495+
def llvm_token_ty : LLVMType<token>; // token
509496

510497
def llvm_x86mmx_ty : LLVMType<x86mmx>;
511-
def llvm_ptrx86mmx_ty : LLVMPointerType<llvm_x86mmx_ty>; // <1 x i64>*
512498

513499
def llvm_aarch64_svcount_ty : LLVMType<aarch64svcount>;
514500

@@ -719,12 +705,12 @@ def int_vaend : DefaultAttrsIntrinsic<[], [llvm_ptr_ty], [], "llvm.va_end">;
719705
//===------------------- Garbage Collection Intrinsics --------------------===//
720706
//
721707
def int_gcroot : Intrinsic<[],
722-
[llvm_ptrptr_ty, llvm_ptr_ty]>;
708+
[llvm_ptr_ty, llvm_ptr_ty]>;
723709
def int_gcread : Intrinsic<[llvm_ptr_ty],
724-
[llvm_ptr_ty, llvm_ptrptr_ty],
710+
[llvm_ptr_ty, llvm_ptr_ty],
725711
[IntrReadMem, IntrArgMemOnly]>;
726712
def int_gcwrite : Intrinsic<[],
727-
[llvm_ptr_ty, llvm_ptr_ty, llvm_ptrptr_ty],
713+
[llvm_ptr_ty, llvm_ptr_ty, llvm_ptr_ty],
728714
[IntrArgMemOnly, NoCapture<ArgIndex<1>>,
729715
NoCapture<ArgIndex<2>>]>;
730716

@@ -742,19 +728,19 @@ def int_objc_autoreleaseReturnValue : Intrinsic<[llvm_ptr_ty],
742728
[llvm_ptr_ty],
743729
[Returned<ArgIndex<0>>]>;
744730
def int_objc_copyWeak : Intrinsic<[],
745-
[llvm_ptrptr_ty,
746-
llvm_ptrptr_ty]>;
747-
def int_objc_destroyWeak : Intrinsic<[], [llvm_ptrptr_ty]>;
731+
[llvm_ptr_ty,
732+
llvm_ptr_ty]>;
733+
def int_objc_destroyWeak : Intrinsic<[], [llvm_ptr_ty]>;
748734
def int_objc_initWeak : Intrinsic<[llvm_ptr_ty],
749-
[llvm_ptrptr_ty,
735+
[llvm_ptr_ty,
750736
llvm_ptr_ty]>;
751737
def int_objc_loadWeak : Intrinsic<[llvm_ptr_ty],
752-
[llvm_ptrptr_ty]>;
738+
[llvm_ptr_ty]>;
753739
def int_objc_loadWeakRetained : Intrinsic<[llvm_ptr_ty],
754-
[llvm_ptrptr_ty]>;
740+
[llvm_ptr_ty]>;
755741
def int_objc_moveWeak : Intrinsic<[],
756-
[llvm_ptrptr_ty,
757-
llvm_ptrptr_ty]>;
742+
[llvm_ptr_ty,
743+
llvm_ptr_ty]>;
758744
def int_objc_release : Intrinsic<[], [llvm_ptr_ty]>;
759745
def int_objc_retain : Intrinsic<[llvm_ptr_ty],
760746
[llvm_ptr_ty],
@@ -770,10 +756,10 @@ def int_objc_retainAutoreleasedReturnValue : Intrinsic<[llvm_ptr_ty],
770756
def int_objc_retainBlock : Intrinsic<[llvm_ptr_ty],
771757
[llvm_ptr_ty]>;
772758
def int_objc_storeStrong : Intrinsic<[],
773-
[llvm_ptrptr_ty,
759+
[llvm_ptr_ty,
774760
llvm_ptr_ty]>;
775761
def int_objc_storeWeak : Intrinsic<[llvm_ptr_ty],
776-
[llvm_ptrptr_ty,
762+
[llvm_ptr_ty,
777763
llvm_ptr_ty]>;
778764
def int_objc_clang_arc_use : Intrinsic<[],
779765
[llvm_vararg_ty]>;
@@ -796,23 +782,23 @@ def int_objc_sync_enter : Intrinsic<[llvm_i32_ty],
796782
def int_objc_sync_exit : Intrinsic<[llvm_i32_ty],
797783
[llvm_ptr_ty]>;
798784
def int_objc_arc_annotation_topdown_bbstart : Intrinsic<[],
799-
[llvm_ptrptr_ty,
800-
llvm_ptrptr_ty]>;
785+
[llvm_ptr_ty,
786+
llvm_ptr_ty]>;
801787
def int_objc_arc_annotation_topdown_bbend : Intrinsic<[],
802-
[llvm_ptrptr_ty,
803-
llvm_ptrptr_ty]>;
788+
[llvm_ptr_ty,
789+
llvm_ptr_ty]>;
804790
def int_objc_arc_annotation_bottomup_bbstart : Intrinsic<[],
805-
[llvm_ptrptr_ty,
806-
llvm_ptrptr_ty]>;
791+
[llvm_ptr_ty,
792+
llvm_ptr_ty]>;
807793
def int_objc_arc_annotation_bottomup_bbend : Intrinsic<[],
808-
[llvm_ptrptr_ty,
809-
llvm_ptrptr_ty]>;
794+
[llvm_ptr_ty,
795+
llvm_ptr_ty]>;
810796
//===--------------- Swift asynchronous context intrinsics ----------------===//
811797

812798
// Returns the location of the Swift asynchronous context (usually stored just
813799
// before the frame pointer), and triggers the creation of a null context if it
814800
// would otherwise be unneeded.
815-
def int_swift_async_context_addr : Intrinsic<[llvm_ptrptr_ty], [], []>;
801+
def int_swift_async_context_addr : Intrinsic<[llvm_ptr_ty], [], []>;
816802

817803
//===--------------------- Code Generator Intrinsics ----------------------===//
818804
//
@@ -901,7 +887,7 @@ def int_experimental_noalias_scope_decl
901887

902888
// Stack Protector Intrinsic - The stackprotector intrinsic writes the stack
903889
// guard to the correct place on the stack frame.
904-
def int_stackprotector : DefaultAttrsIntrinsic<[], [llvm_ptr_ty, llvm_ptrptr_ty], []>;
890+
def int_stackprotector : DefaultAttrsIntrinsic<[], [llvm_ptr_ty, llvm_ptr_ty], []>;
905891
def int_stackguard : DefaultAttrsIntrinsic<[llvm_ptr_ty], [], []>;
906892

907893
// A cover for instrumentation based profiling.
@@ -1507,7 +1493,7 @@ def int_var_annotation : DefaultAttrsIntrinsic<
15071493
[IntrInaccessibleMemOnly], "llvm.var.annotation">;
15081494

15091495
def int_ptr_annotation : DefaultAttrsIntrinsic<
1510-
[LLVMAnyPointerType<llvm_anyint_ty>],
1496+
[llvm_anyptr_ty],
15111497
[LLVMMatchType<0>, llvm_anyptr_ty, LLVMMatchType<1>, llvm_i32_ty, LLVMMatchType<1>],
15121498
[IntrInaccessibleMemOnly], "llvm.ptr.annotation">;
15131499

@@ -1652,13 +1638,13 @@ def int_lifetime_end : DefaultAttrsIntrinsic<[],
16521638
[IntrArgMemOnly, IntrWillReturn,
16531639
NoCapture<ArgIndex<1>>,
16541640
ImmArg<ArgIndex<0>>]>;
1655-
def int_invariant_start : DefaultAttrsIntrinsic<[llvm_descriptor_ty],
1641+
def int_invariant_start : DefaultAttrsIntrinsic<[llvm_ptr_ty],
16561642
[llvm_i64_ty, llvm_anyptr_ty],
16571643
[IntrArgMemOnly, IntrWillReturn,
16581644
NoCapture<ArgIndex<1>>,
16591645
ImmArg<ArgIndex<0>>]>;
16601646
def int_invariant_end : DefaultAttrsIntrinsic<[],
1661-
[llvm_descriptor_ty, llvm_i64_ty,
1647+
[llvm_ptr_ty, llvm_i64_ty,
16621648
llvm_anyptr_ty],
16631649
[IntrArgMemOnly, IntrWillReturn,
16641650
NoCapture<ArgIndex<2>>,
@@ -1889,13 +1875,13 @@ def int_experimental_stepvector : DefaultAttrsIntrinsic<[llvm_anyvector_ty],
18891875
// Memory Intrinsics
18901876
def int_vp_store : DefaultAttrsIntrinsic<[],
18911877
[ llvm_anyvector_ty,
1892-
LLVMAnyPointerType<LLVMMatchType<0>>,
1878+
llvm_anyptr_ty,
18931879
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
18941880
llvm_i32_ty],
18951881
[ NoCapture<ArgIndex<1>>, IntrNoSync, IntrWriteMem, IntrArgMemOnly, IntrWillReturn ]>;
18961882

18971883
def int_vp_load : DefaultAttrsIntrinsic<[ llvm_anyvector_ty],
1898-
[ LLVMAnyPointerType<LLVMMatchType<0>>,
1884+
[ llvm_anyptr_ty,
18991885
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
19001886
llvm_i32_ty],
19011887
[ NoCapture<ArgIndex<0>>, IntrNoSync, IntrReadMem, IntrWillReturn, IntrArgMemOnly ]>;
@@ -2337,14 +2323,14 @@ def int_vp_is_fpclass:
23372323
//
23382324
def int_masked_load:
23392325
DefaultAttrsIntrinsic<[llvm_anyvector_ty],
2340-
[LLVMAnyPointerType<LLVMMatchType<0>>, llvm_i32_ty,
2326+
[llvm_anyptr_ty, llvm_i32_ty,
23412327
LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, LLVMMatchType<0>],
23422328
[IntrReadMem, IntrArgMemOnly, IntrWillReturn, ImmArg<ArgIndex<1>>,
23432329
NoCapture<ArgIndex<0>>]>;
23442330

23452331
def int_masked_store:
23462332
DefaultAttrsIntrinsic<[],
2347-
[llvm_anyvector_ty, LLVMAnyPointerType<LLVMMatchType<0>>,
2333+
[llvm_anyvector_ty, llvm_anyptr_ty,
23482334
llvm_i32_ty, LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>],
23492335
[IntrWriteMem, IntrArgMemOnly, IntrWillReturn,
23502336
ImmArg<ArgIndex<2>>, NoCapture<ArgIndex<1>>]>;

‎llvm/include/llvm/IR/IntrinsicsAArch64.td

Lines changed: 8 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -557,15 +557,15 @@ def int_aarch64_neon_vcopy_lane: AdvSIMD_2Vector2Index_Intrinsic;
557557

558558
let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
559559
class AdvSIMD_1Vec_Load_Intrinsic
560-
: DefaultAttrsIntrinsic<[llvm_anyvector_ty], [LLVMAnyPointerType<LLVMMatchType<0>>],
560+
: DefaultAttrsIntrinsic<[llvm_anyvector_ty], [llvm_anyptr_ty],
561561
[IntrReadMem, IntrArgMemOnly]>;
562562
class AdvSIMD_1Vec_Store_Lane_Intrinsic
563563
: DefaultAttrsIntrinsic<[], [llvm_anyvector_ty, llvm_i64_ty, llvm_anyptr_ty],
564564
[IntrArgMemOnly, NoCapture<ArgIndex<2>>]>;
565565

566566
class AdvSIMD_2Vec_Load_Intrinsic
567567
: DefaultAttrsIntrinsic<[LLVMMatchType<0>, llvm_anyvector_ty],
568-
[LLVMAnyPointerType<LLVMMatchType<0>>],
568+
[llvm_anyptr_ty],
569569
[IntrReadMem, IntrArgMemOnly]>;
570570
class AdvSIMD_2Vec_Load_Lane_Intrinsic
571571
: DefaultAttrsIntrinsic<[LLVMMatchType<0>, LLVMMatchType<0>],
@@ -574,7 +574,7 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
574574
[IntrReadMem, IntrArgMemOnly]>;
575575
class AdvSIMD_2Vec_Store_Intrinsic
576576
: DefaultAttrsIntrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
577-
LLVMAnyPointerType<LLVMMatchType<0>>],
577+
llvm_anyptr_ty],
578578
[IntrArgMemOnly, NoCapture<ArgIndex<2>>]>;
579579
class AdvSIMD_2Vec_Store_Lane_Intrinsic
580580
: DefaultAttrsIntrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
@@ -583,7 +583,7 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
583583

584584
class AdvSIMD_3Vec_Load_Intrinsic
585585
: DefaultAttrsIntrinsic<[LLVMMatchType<0>, LLVMMatchType<0>, llvm_anyvector_ty],
586-
[LLVMAnyPointerType<LLVMMatchType<0>>],
586+
[llvm_anyptr_ty],
587587
[IntrReadMem, IntrArgMemOnly]>;
588588
class AdvSIMD_3Vec_Load_Lane_Intrinsic
589589
: DefaultAttrsIntrinsic<[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
@@ -592,7 +592,7 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
592592
[IntrReadMem, IntrArgMemOnly]>;
593593
class AdvSIMD_3Vec_Store_Intrinsic
594594
: DefaultAttrsIntrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
595-
LLVMMatchType<0>, LLVMAnyPointerType<LLVMMatchType<0>>],
595+
LLVMMatchType<0>, llvm_anyptr_ty],
596596
[IntrArgMemOnly, NoCapture<ArgIndex<3>>]>;
597597
class AdvSIMD_3Vec_Store_Lane_Intrinsic
598598
: DefaultAttrsIntrinsic<[], [llvm_anyvector_ty,
@@ -603,7 +603,7 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
603603
class AdvSIMD_4Vec_Load_Intrinsic
604604
: DefaultAttrsIntrinsic<[LLVMMatchType<0>, LLVMMatchType<0>,
605605
LLVMMatchType<0>, llvm_anyvector_ty],
606-
[LLVMAnyPointerType<LLVMMatchType<0>>],
606+
[llvm_anyptr_ty],
607607
[IntrReadMem, IntrArgMemOnly]>;
608608
class AdvSIMD_4Vec_Load_Lane_Intrinsic
609609
: DefaultAttrsIntrinsic<[LLVMMatchType<0>, LLVMMatchType<0>,
@@ -615,7 +615,7 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
615615
class AdvSIMD_4Vec_Store_Intrinsic
616616
: DefaultAttrsIntrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
617617
LLVMMatchType<0>, LLVMMatchType<0>,
618-
LLVMAnyPointerType<LLVMMatchType<0>>],
618+
llvm_anyptr_ty],
619619
[IntrArgMemOnly, NoCapture<ArgIndex<4>>]>;
620620
class AdvSIMD_4Vec_Store_Lane_Intrinsic
621621
: DefaultAttrsIntrinsic<[], [llvm_anyvector_ty, LLVMMatchType<0>,
@@ -1348,8 +1348,7 @@ let TargetPrefix = "aarch64" in { // All intrinsics start with "llvm.aarch64.".
13481348

13491349
class SVE2_CONFLICT_DETECT_Intrinsic
13501350
: DefaultAttrsIntrinsic<[llvm_anyvector_ty],
1351-
[LLVMAnyPointerType<llvm_any_ty>,
1352-
LLVMMatchType<1>],
1351+
[llvm_anyptr_ty, LLVMMatchType<1>],
13531352
[IntrNoMem]>;
13541353

13551354
class SVE2_3VectorArg_Indexed_Intrinsic

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