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[SYCL][FPBuiltin][SPIRV] Enable SPV_INTEL_fp_max_error extension for SYCL offloads to CPU backends (#11870)
This extension is currently enabled for SYCL offloads to CPU backends. It will eventually be eventually be enabled by default for all backends. Thanks --------- Signed-off-by: Arvind Sudarsanam <[email protected]>
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-8
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3 files changed

+48
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‎clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10005,12 +10005,20 @@ void SPIRVTranslator::ConstructJob(Compilation &C, const JobAction &JA,
1000510005
TranslatorArgs.push_back("-o");
1000610006
TranslatorArgs.push_back(Output.getFilename());
1000710007
if (JA.isDeviceOffloading(Action::OFK_SYCL)) {
10008+
const toolchains::SYCLToolChain &TC =
10009+
static_cast<const toolchains::SYCLToolChain &>(getToolChain());
10010+
llvm::Triple Triple = TC.getTriple();
10011+
bool IsCPU = Triple.isSPIR() &&
10012+
Triple.getSubArch() == llvm::Triple::SPIRSubArch_x86_64;
1000810013
TranslatorArgs.push_back("-spirv-max-version=1.4");
1000910014
TranslatorArgs.push_back("-spirv-debug-info-version=ocl-100");
1001010015
// Prevent crash in the translator if input IR contains DIExpression
1001110016
// operations which don't have mapping to OpenCL.DebugInfo.100 spec.
1001210017
TranslatorArgs.push_back("-spirv-allow-extra-diexpressions");
10013-
TranslatorArgs.push_back("-spirv-allow-unknown-intrinsics=llvm.genx.");
10018+
std::string UnknownIntrinsics("-spirv-allow-unknown-intrinsics=llvm.genx.");
10019+
if (IsCPU)
10020+
UnknownIntrinsics += ",llvm.fpbuiltin";
10021+
TranslatorArgs.push_back(TCArgs.MakeArgString(UnknownIntrinsics));
1001410022
bool CreatingSyclSPIRVFatObj =
1001510023
C.getDriver().getFinalPhase(C.getArgs()) != phases::Link &&
1001610024
TCArgs.getLastArgValue(options::OPT_fsycl_device_obj_EQ)
@@ -10069,12 +10077,11 @@ void SPIRVTranslator::ConstructJob(Compilation &C, const JobAction &JA,
1006910077
",+SPV_INTEL_optnone";
1007010078
if (ShouldPreserveMetadata)
1007110079
ExtArg += ",+SPV_KHR_non_semantic_info";
10080+
if (IsCPU)
10081+
ExtArg += ",+SPV_INTEL_fp_max_error";
1007210082

1007310083
TranslatorArgs.push_back(TCArgs.MakeArgString(ExtArg));
1007410084

10075-
const toolchains::SYCLToolChain &TC =
10076-
static_cast<const toolchains::SYCLToolChain &>(getToolChain());
10077-
1007810085
// Handle -Xspirv-translator
1007910086
TC.TranslateTargetOpt(
1008010087
TCArgs, TranslatorArgs, options::OPT_Xspirv_translator,

‎clang/test/Driver/sycl-offload-aot.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -143,7 +143,7 @@
143143
// CHK-TOOLS-AOT: llvm-link{{.*}} "[[OUTPUT1]]" "-o" "[[OUTPUT2:.+\.bc]]"
144144
// CHK-TOOLS-AOT: sycl-post-link{{.*}} "-o" "[[OUTPUT2_T:.+\.table]]" "[[OUTPUT2]]"
145145
// CHK-TOOLS-AOT: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT2_1:.+\.txt]]" "[[OUTPUT2_T]]"
146-
// CHK-TOOLS-CPU: llvm-spirv{{.*}} "-o" "[[OUTPUT3_T:.+\.txt]]" "-spirv-max-version=1.4" "-spirv-debug-info-version=ocl-100" "-spirv-allow-extra-diexpressions" "-spirv-allow-unknown-intrinsics=llvm.genx." {{.*}} "[[OUTPUT2_1]]"
146+
// CHK-TOOLS-CPU: llvm-spirv{{.*}} "-o" "[[OUTPUT3_T:.+\.txt]]" "-spirv-max-version=1.4" "-spirv-debug-info-version=ocl-100" "-spirv-allow-extra-diexpressions" "-spirv-allow-unknown-intrinsics=llvm.genx.,llvm.fpbuiltin" {{.*}} "[[OUTPUT2_1]]"
147147
// CHK-TOOLS-GEN: llvm-spirv{{.*}} "-o" "[[OUTPUT3_T:.+\.txt]]" "-spirv-max-version=1.4" "-spirv-debug-info-version=ocl-100" "-spirv-allow-extra-diexpressions" "-spirv-allow-unknown-intrinsics=llvm.genx." {{.*}} "[[OUTPUT2_1]]"
148148
// CHK-TOOLS-FPGA: llvm-spirv{{.*}} "-o" "[[OUTPUT3_T:.+\.txt]]" "-spirv-max-version=1.4" "-spirv-debug-info-version=ocl-100" "-spirv-allow-extra-diexpressions" "-spirv-allow-unknown-intrinsics=llvm.genx." {{.*}} "[[OUTPUT2_1]]"
149149
// CHK-TOOLS-FPGA-HW: aoc{{.*}} "-o" "[[OUTPUT4_T:.+\.aocx]]" "[[OUTPUT3_T]]"

‎clang/test/Driver/sycl-spirv-ext.c

Lines changed: 36 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -18,12 +18,10 @@
1818
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
1919
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_gen-unknown-unknown %s -### 2>&1 \
2020
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
21-
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_x86_64-unknown-unknown %s -### 2>&1 \
22-
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
2321
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_gen-unknown-unknown %s -### 2>&1 \
2422
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
2523
// RUN: %clang -target x86_64-unknown-linux-gnu -fsycl -fsycl-targets=spir64_x86_64-unknown-unknown %s -### 2>&1 \
26-
// RUN: | FileCheck %s -check-prefixes=CHECK-DEFAULT
24+
// RUN: | FileCheck %s -check-prefixes=CHECK-CPU
2725

2826
// CHECK-DEFAULT: llvm-spirv{{.*}}"-spirv-ext=-all
2927
// CHECK-DEFAULT-SAME:,+SPV_EXT_shader_atomic_float_add
@@ -85,3 +83,38 @@
8583
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_dsp_control
8684
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_memory_accesses
8785
// CHECK-FPGA-HW-SAME:,+SPV_INTEL_fpga_memory_attributes"
86+
// CHECK-CPU: llvm-spirv{{.*}}"-spirv-allow-unknown-intrinsics=llvm.genx.,llvm.fpbuiltin"
87+
// CHECK-CPU-SAME: {{.*}}"-spirv-ext=-all
88+
// CHECK-CPU-SAME:,+SPV_EXT_shader_atomic_float_add
89+
// CHECK-CPU-SAME:,+SPV_EXT_shader_atomic_float_min_max
90+
// CHECK-CPU-SAME:,+SPV_KHR_no_integer_wrap_decoration,+SPV_KHR_float_controls
91+
// CHECK-CPU-SAME:,+SPV_KHR_expect_assume,+SPV_KHR_linkonce_odr
92+
// CHECK-CPU-SAME:,+SPV_INTEL_subgroups,+SPV_INTEL_media_block_io
93+
// CHECK-CPU-SAME:,+SPV_INTEL_device_side_avc_motion_estimation
94+
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_loop_controls
95+
// CHECK-CPU-SAME:,+SPV_INTEL_unstructured_loop_controls,+SPV_INTEL_fpga_reg
96+
// CHECK-CPU-SAME:,+SPV_INTEL_blocking_pipes,+SPV_INTEL_function_pointers
97+
// CHECK-CPU-SAME:,+SPV_INTEL_kernel_attributes,+SPV_INTEL_io_pipes
98+
// CHECK-CPU-SAME:,+SPV_INTEL_inline_assembly,+SPV_INTEL_arbitrary_precision_integers
99+
// CHECK-CPU-SAME:,+SPV_INTEL_float_controls2
100+
// CHECK-CPU-SAME:,+SPV_INTEL_vector_compute,+SPV_INTEL_fast_composite
101+
// CHECK-CPU-SAME:,+SPV_INTEL_arbitrary_precision_fixed_point
102+
// CHECK-CPU-SAME:,+SPV_INTEL_arbitrary_precision_floating_point
103+
// CHECK-CPU-SAME:,+SPV_INTEL_variable_length_array,+SPV_INTEL_fp_fast_math_mode
104+
// CHECK-CPU-SAME:,+SPV_INTEL_long_constant_composite
105+
// CHECK-CPU-SAME:,+SPV_INTEL_arithmetic_fence
106+
// CHECK-CPU-SAME:,+SPV_INTEL_cache_controls
107+
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_buffer_location
108+
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_argument_interfaces
109+
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_invocation_pipelining_attributes
110+
// CHECK-CPU-SAME:,+SPV_INTEL_fpga_latency_control
111+
// CHECK-CPU-SAME:,+SPV_INTEL_token_type
112+
// CHECK-CPU-SAME:,+SPV_INTEL_bfloat16_conversion
113+
// CHECK-CPU-SAME:,+SPV_INTEL_joint_matrix
114+
// CHECK-CPU-SAME:,+SPV_INTEL_hw_thread_queries
115+
// CHECK-CPU-SAME:,+SPV_KHR_uniform_group_instructions
116+
// CHECK-CPU-SAME:,+SPV_INTEL_masked_gather_scatter
117+
// CHECK-CPU-SAME:,+SPV_INTEL_tensor_float32_conversion
118+
// CHECK-CPU-SAME:,+SPV_INTEL_optnone
119+
// CHECK-CPU-SAME:,+SPV_INTEL_fp_max_error"
120+

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