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author
iclsrc
committed
Merge from 'sycl' to 'sycl-web' (#1)
2 parents f051cbd + a56c1f4 commit 8e10e63

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18 files changed

+596
-40
lines changed

18 files changed

+596
-40
lines changed

clang/lib/Driver/ToolChains/SYCL.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -317,7 +317,8 @@ void SYCL::fpga::BackendCompiler::ConstructJob(Compilation &C,
317317

318318
// Depending on output file designations, set the report folder
319319
SmallString<128> ReportOptArg;
320-
if (Arg *FinalOutput = Args.getLastArg(options::OPT_o)) {
320+
if (Arg *FinalOutput = Args.getLastArg(options::OPT_o, options::OPT__SLASH_o,
321+
options::OPT__SLASH_Fe)) {
321322
SmallString<128> FN(FinalOutput->getValue());
322323
llvm::sys::path::replace_extension(FN, "prj");
323324
const char * FolderName = Args.MakeArgString(FN);

clang/test/Driver/sycl-offload-intelfpga.cpp

Lines changed: 24 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -4,23 +4,23 @@
44
// REQUIRES: clang-driver
55

66
/// -fintelfpga implies -g and -MMD
7-
// RUN: %clang++ -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %s 2>&1 \
7+
// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %s 2>&1 \
88
// RUN: | FileCheck -check-prefix=CHK-TOOLS-INTELFPGA %s
99
// CHK-TOOLS-INTELFPGA: clang{{.*}} "-debug-info-kind=limited" {{.*}} "-dependency-file"
1010
// CHK-TOOLS-INTELFPGA: aoc{{.*}} "-dep-files={{.*}}"
1111

1212
/// -fintelfpga implies -g but -g0 should override
13-
// RUN: %clang++ -### -target x86_64-unknown-linux-gnu -g0 -fsycl -fintelfpga %s 2>&1 \
13+
// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -g0 -fsycl -fintelfpga %s 2>&1 \
1414
// RUN: | FileCheck -check-prefix=CHK-TOOLS-INTELFPGA-G0 %s
1515
// CHK-TOOLS-INTELFPGA-G0-NOT: clang{{.*}} "-debug-info-kind=limited"
1616

1717
/// -fintelfpga -fsycl-link tests
1818
// RUN: touch %t.o
19-
// RUN: %clang++ -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link %t.o 2>&1 \
19+
// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link %t.o 2>&1 \
2020
// RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK,CHK-FPGA-EARLY %s
21-
// RUN: %clang++ -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.o 2>&1 \
21+
// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.o 2>&1 \
2222
// RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK,CHK-FPGA-EARLY %s
23-
// RUN: %clang++ -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=image %t.o 2>&1 \
23+
// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=image %t.o 2>&1 \
2424
// RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK,CHK-FPGA-IMAGE %s
2525
// CHK-FPGA-LINK-NOT: clang-offload-bundler{{.*}} "-check-section"
2626
// CHK-FPGA-LINK: clang-offload-bundler{{.*}} "-type=o" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUT:.+\.o]]" "-outputs=[[OUTPUT1:.+\.o]]" "-unbundle"
@@ -49,9 +49,9 @@
4949
// RUN: clang-offload-wrapper -o %t-aocr.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aocr-intel-unknown-sycldevice %t.aocr
5050
// RUN: llc -filetype=obj -o %t-aocr.o %t-aocr.bc
5151
// RUN: llvm-ar crv %t.a %t.o %t-aocr.o
52-
// RUN: %clang++ -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=image %t.a 2>&1 \
52+
// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=image %t.a 2>&1 \
5353
// RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-LIB,CHK-FPGA-LINK-LIB-IMAGE %s
54-
// RUN: %clang++ -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.a 2>&1 \
54+
// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.a 2>&1 \
5555
// RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-LIB,CHK-FPGA-LINK-LIB-EARLY %s
5656
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice" "-inputs=[[INPUT:.+\.a]]" "-check-section"
5757
// CHK-FPGA-LINK-LIB: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocr-intel-unknown-sycldevice" "-inputs=[[INPUT]]" "-check-section"
@@ -66,7 +66,7 @@
6666

6767
/// -fintelfpga with AOCR library and additional object
6868
// RUN: touch %t2.o
69-
// RUN: %clang++ -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t.a %t2.o 2>&1 \
69+
// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t.a %t2.o 2>&1 \
7070
// RUN: | FileCheck -check-prefixes=CHK-FPGA %s
7171
// CHK-FPGA: aoc{{.*}} "-o" {{.*}} "-sycl"
7272
// CHK-FPGA: llc{{.*}} "-filetype=obj" "-o" "[[FINALLINK:.*\.o]]"
@@ -87,7 +87,7 @@
8787
// RUN: clang-offload-wrapper -o %t-aocx.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aocx-intel-unknown-sycldevice %t.aocx
8888
// RUN: llc -filetype=obj -o %t-aocx.o %t-aocx.bc
8989
// RUN: llvm-ar crv %t_aocx.a %t.o %t-aocx.o
90-
// RUN: %clang++ -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t_aocx.a -ccc-print-phases 2>&1 \
90+
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t_aocx.a -ccc-print-phases 2>&1 \
9191
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-PHASES,CHK-FPGA-AOCX-PHASES-DEFAULT %s
9292
// RUN: %clang_cl -fsycl -fintelfpga %t_aocx.a -ccc-print-phases 2>&1 \
9393
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-PHASES,CHK-FPGA-AOCX-PHASES-CL %s
@@ -99,7 +99,7 @@
9999
// CHK-FPGA-AOCX-PHASES-DEFAULT: 5: offload, "host-sycl (x86_64-unknown-linux-gnu)" {1}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {4}, image
100100
// CHK-FPGA-AOCX-PHASES-CL: 5: offload, "host-sycl (x86_64-pc-windows-msvc)" {1}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice-coff)" {4}, image
101101

102-
// RUN: %clang++ -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t_aocx.a -### 2>&1 \
102+
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t_aocx.a -### 2>&1 \
103103
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX %s
104104
// CHK-FPGA-AOCX: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
105105
// CHK-FPGA-AOCX: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_fpga" "-kind=sycl" "[[BUNDLEOUT]]"
@@ -108,7 +108,7 @@
108108

109109
/// -fintelfpga -fsycl-link from source
110110
// RUN: touch %t.cpp
111-
// RUN: %clang++ -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.cpp -ccc-print-phases 2>&1 \
111+
// RUN: %clangxx -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.cpp -ccc-print-phases 2>&1 \
112112
// RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-SRC,CHK-FPGA-LINK-SRC-DEFAULT %s
113113
// RUN: %clang_cl -### -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -fsycl-link=early %t.cpp -ccc-print-phases 2>&1 \
114114
// RUN: | FileCheck -check-prefixes=CHK-FPGA-LINK-SRC,CHK-FPGA-LINK-SRC-CL %s
@@ -134,20 +134,30 @@
134134

135135
/// -fintelfpga with -reuse-exe=
136136
// RUN: touch %t.cpp
137-
// RUN: %clang++ -### -reuse-exe=testing -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t.cpp 2>&1 \
137+
// RUN: %clangxx -### -reuse-exe=testing -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t.cpp 2>&1 \
138138
// RUN: | FileCheck -check-prefixes=CHK-FPGA-REUSE-EXE %s
139139
// CHK-FPGA-REUSE-EXE: aoc{{.*}} "-o" {{.*}} "-sycl" {{.*}} "-reuse-exe=testing"
140140

141141
/// -fintelfpga dependency file generation test
142142
// RUN: touch %t-1.cpp
143143
// RUN: touch %t-2.cpp
144-
// RUN: %clang++ -### -fsycl -fintelfpga %t-1.cpp %t-2.cpp -o %t.out 2>&1 \
144+
// RUN: %clangxx -### -fsycl -fintelfpga %t-1.cpp %t-2.cpp -o %t.out 2>&1 \
145145
// RUN: | FileCheck -check-prefix=CHK-FPGA-DEP-FILES %s
146-
// RUN: %clang++ -### -fsycl -fintelfpga %t-1.cpp %t-2.cpp 2>&1 \
146+
// RUN: %clangxx -### -fsycl -fintelfpga %t-1.cpp %t-2.cpp 2>&1 \
147147
// RUN: | FileCheck -check-prefix=CHK-FPGA-DEP-FILES %s
148148
// CHK-FPGA-DEP-FILES: clang{{.*}} "-dependency-file" "[[INPUT1:.+\.d]]"
149149
// CHK-FPGA-DEP-FILES: clang{{.*}} "-dependency-file" "[[INPUT2:.+\.d]]"
150150
// CHK-FPGA-DEP-FILES: aoc{{.*}} "-dep-files={{.*}}[[INPUT1]],{{.*}}[[INPUT2]]"
151151

152+
/// -fintelfpga output report file test
153+
// RUN: mkdir -p %t_dir
154+
// RUN: %clangxx -### -fsycl -fintelfpga %s -o %t_dir/file.out 2>&1 \
155+
// RUN: | FileCheck -DOUTDIR=%t_dir -check-prefix=CHK-FPGA-REPORT-OPT %s
156+
// RUN: %clang_cl -### -fsycl -fintelfpga %s -o %t_dir/file.out 2>&1 \
157+
// RUN: | FileCheck -DOUTDIR=%t_dir -check-prefix=CHK-FPGA-REPORT-OPT %s
158+
// RUN: %clang_cl -### -fsycl -fintelfpga %s -Fe%t_dir/file.out 2>&1 \
159+
// RUN: | FileCheck -DOUTDIR=%t_dir -check-prefix=CHK-FPGA-REPORT-OPT %s
160+
// CHK-FPGA-REPORT-OPT: aoc{{.*}} "-sycl" {{.*}} "-output-report-folder=[[OUTDIR]]{{/|\\\\}}file.prj"
161+
152162
// TODO: SYCL specific fail - analyze and enable
153163
// XFAIL: windows-msvc

llvm-spirv/lib/SPIRV/SPIRVReader.cpp

Lines changed: 73 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1716,6 +1716,79 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
17161716
return mapValue(BV, V);
17171717
}
17181718

1719+
case OpMatrixTimesMatrix: {
1720+
auto *MTM = static_cast<SPIRVMatrixTimesMatrix *>(BV);
1721+
IRBuilder<> Builder(BB);
1722+
Value *M1 = transValue(MTM->getLeftMatrix(), F, BB);
1723+
Value *M2 = transValue(MTM->getRightMatrix(), F, BB);
1724+
1725+
// Each matrix consists of a list of columns.
1726+
// M1 (the left matrix) is of C1 columns and R1 rows.
1727+
// M1 consists of a list of vectors: V_1, V_2, ..., V_C1
1728+
// where V_x are vectors of size R1.
1729+
//
1730+
// M2 (the right matrix) is of C2 columns and R2 rows.
1731+
// M2 consists of a list of vectors: U_1, U_2, ..., U_C2
1732+
// where U_x are vectors of size R2.
1733+
//
1734+
// Now M1 * M2 requires C1 == R2.
1735+
// The result is a matrix of C2 columns and R1 rows.
1736+
// That is, consists of C2 vectors of size R1.
1737+
//
1738+
// M1 * M2 algorithm is as below:
1739+
//
1740+
// Result = { dot_product(U_1, M1),
1741+
// dot_product(U_2, M1),
1742+
// ...
1743+
// dot_product(U_C2, M1) };
1744+
// where
1745+
// dot_product (U, M) is defined as:
1746+
//
1747+
// |-------- C1 ------|
1748+
// Result = sum ( {U[1], U[1], ..., U[1]} * V_1,
1749+
// {U[2], U[2], ..., U[2]} * V_2,
1750+
// ...
1751+
// {U[R2], U[R2], ..., U[R2]} * V_C1 );
1752+
// Note that C1 == R2
1753+
// sum is defined as vector sum.
1754+
1755+
unsigned C1 = M1->getType()->getArrayNumElements();
1756+
unsigned C2 = M2->getType()->getArrayNumElements();
1757+
VectorType *V1Ty =
1758+
cast<VectorType>(cast<ArrayType>(M1->getType())->getElementType());
1759+
VectorType *V2Ty =
1760+
cast<VectorType>(cast<ArrayType>(M2->getType())->getElementType());
1761+
unsigned R1 = V1Ty->getVectorNumElements();
1762+
unsigned R2 = V2Ty->getVectorNumElements();
1763+
auto ETy = V1Ty->getElementType();
1764+
1765+
assert(C1 == R2 && "Unmatched matrix");
1766+
1767+
auto VTy = VectorType::get(ETy, R1);
1768+
auto ResultTy = ArrayType::get(VTy, C2);
1769+
1770+
Value *Res = UndefValue::get(ResultTy);
1771+
1772+
for (unsigned Idx = 0; Idx != C2; ++Idx) {
1773+
Value *U = Builder.CreateExtractValue(M2, Idx);
1774+
1775+
// Calculate dot_product(U, M1)
1776+
Value *Dot = Builder.CreateVectorSplat(R1, ConstantFP::get(ETy, 0.0));
1777+
1778+
for (unsigned Idx2 = 0; Idx2 != R2; ++Idx2) {
1779+
Value *Ux = Builder.CreateExtractElement(U, Builder.getInt32(Idx2));
1780+
Value *Lhs = Builder.CreateVectorSplat(R1, Ux);
1781+
Value *Rhs = Builder.CreateExtractValue(M1, Idx2);
1782+
Value *Mul = Builder.CreateFMul(Lhs, Rhs);
1783+
Dot = Builder.CreateFAdd(Dot, Mul);
1784+
}
1785+
1786+
Res = Builder.CreateInsertValue(Res, Dot, Idx);
1787+
}
1788+
1789+
return mapValue(BV, Res);
1790+
}
1791+
17191792
case OpCopyObject: {
17201793
SPIRVCopyObject *CO = static_cast<SPIRVCopyObject *>(BV);
17211794
AllocaInst *AI =

llvm-spirv/lib/SPIRV/libSPIRV/SPIRV.debug.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -283,7 +283,7 @@ enum {
283283
SourceIdx = 2,
284284
LineIdx = 3,
285285
ColumnIdx = 4,
286-
OperandCount = 4
286+
OperandCount = 5
287287
};
288288
}
289289

llvm-spirv/lib/SPIRV/libSPIRV/SPIRVEntry.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -786,7 +786,6 @@ _SPIRV_OP(ImageDrefGather)
786786
_SPIRV_OP(QuantizeToF16)
787787
_SPIRV_OP(Transpose)
788788
_SPIRV_OP(ArrayLength)
789-
_SPIRV_OP(MatrixTimesMatrix)
790789
_SPIRV_OP(OuterProduct)
791790
_SPIRV_OP(IAddCarry)
792791
_SPIRV_OP(ISubBorrow)

llvm-spirv/lib/SPIRV/libSPIRV/SPIRVFunction.cpp

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -136,12 +136,17 @@ bool SPIRVFunction::decodeBB(SPIRVDecoder &Decoder) {
136136
break;
137137
}
138138

139-
if (Decoder.OpCode == OpLine) {
140-
Module->add(Decoder.getEntry());
139+
if (Decoder.OpCode == OpNoLine || Decoder.OpCode == OpNop) {
141140
continue;
142141
}
143142

144143
SPIRVEntry *Entry = Decoder.getEntry();
144+
145+
if (Decoder.OpCode == OpLine) {
146+
Module->add(Entry);
147+
continue;
148+
}
149+
145150
if (!Module->getErrorLog().checkError(Entry->isImplemented(),
146151
SPIRVEC_UnimplementedOpCode,
147152
std::to_string(Entry->getOpCode()))) {

llvm-spirv/lib/SPIRV/libSPIRV/SPIRVInstruction.h

Lines changed: 62 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1444,6 +1444,68 @@ class SPIRVMatrixTimesVector : public SPIRVInstruction {
14441444
SPIRVId Vector;
14451445
};
14461446

1447+
class SPIRVMatrixTimesMatrix : public SPIRVInstruction {
1448+
public:
1449+
static const Op OC = OpMatrixTimesMatrix;
1450+
static const SPIRVWord FixedWordCount = 4;
1451+
1452+
// Complete constructor
1453+
SPIRVMatrixTimesMatrix(SPIRVType *TheType, SPIRVId TheId, SPIRVId M1,
1454+
SPIRVId M2, SPIRVBasicBlock *BB)
1455+
: SPIRVInstruction(5, OC, TheType, TheId, BB), LeftMatrix(M1),
1456+
RightMatrix(M2) {
1457+
validate();
1458+
assert(BB && "Invalid BB");
1459+
}
1460+
1461+
// Incomplete constructor
1462+
SPIRVMatrixTimesMatrix()
1463+
: SPIRVInstruction(OC), LeftMatrix(SPIRVID_INVALID),
1464+
RightMatrix(SPIRVID_INVALID) {}
1465+
1466+
SPIRVValue *getLeftMatrix() const { return getValue(LeftMatrix); }
1467+
1468+
SPIRVValue *getRightMatrix() const { return getValue(RightMatrix); }
1469+
1470+
std::vector<SPIRVValue *> getOperands() override {
1471+
std::vector<SPIRVId> Operands;
1472+
Operands.push_back(LeftMatrix);
1473+
Operands.push_back(RightMatrix);
1474+
return getValues(Operands);
1475+
}
1476+
1477+
void setWordCount(SPIRVWord FixedWordCount) override {
1478+
SPIRVEntry::setWordCount(FixedWordCount);
1479+
}
1480+
1481+
_SPIRV_DEF_ENCDEC4(Type, Id, LeftMatrix, RightMatrix)
1482+
1483+
void validate() const override {
1484+
SPIRVInstruction::validate();
1485+
if (getValue(LeftMatrix)->isForward() || getValue(RightMatrix)->isForward())
1486+
return;
1487+
1488+
SPIRVType *Ty = getType()->getScalarType();
1489+
SPIRVType *LMTy = getValueType(LeftMatrix)->getScalarType();
1490+
SPIRVType *RMTy = getValueType(RightMatrix)->getScalarType();
1491+
1492+
(void)Ty;
1493+
(void)LMTy;
1494+
(void)RMTy;
1495+
assert(Ty->isTypeFloat() && "Invalid result type for OpMatrixTimesMatrix");
1496+
assert(LMTy->isTypeFloat() &&
1497+
"Invalid Matrix type for OpMatrixTimesMatrix");
1498+
assert(RMTy->isTypeFloat() &&
1499+
"Invalid Matrix type for OpMatrixTimesMatrix");
1500+
1501+
assert(Ty == LMTy && Ty == RMTy && "Mismatch float type");
1502+
}
1503+
1504+
private:
1505+
SPIRVId LeftMatrix;
1506+
SPIRVId RightMatrix;
1507+
};
1508+
14471509
class SPIRVUnary : public SPIRVInstTemplateBase {
14481510
protected:
14491511
void validate() const override {

llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -385,6 +385,9 @@ class SPIRVModuleImpl : public SPIRVModule {
385385
SPIRVId TheMatrix,
386386
SPIRVId TheVector,
387387
SPIRVBasicBlock *BB) override;
388+
SPIRVInstruction *addMatrixTimesMatrixInst(SPIRVType *TheType, SPIRVId M1,
389+
SPIRVId M2,
390+
SPIRVBasicBlock *BB) override;
388391
SPIRVInstruction *addUnaryInst(Op, SPIRVType *, SPIRVValue *,
389392
SPIRVBasicBlock *) override;
390393
SPIRVInstruction *addVariable(SPIRVType *, bool, SPIRVLinkageTypeKind,
@@ -1099,6 +1102,13 @@ SPIRVModuleImpl::addMatrixTimesVectorInst(SPIRVType *TheType, SPIRVId TheMatrix,
10991102
new SPIRVMatrixTimesVector(TheType, getId(), TheMatrix, TheVector, BB));
11001103
}
11011104

1105+
SPIRVInstruction *
1106+
SPIRVModuleImpl::addMatrixTimesMatrixInst(SPIRVType *TheType, SPIRVId M1,
1107+
SPIRVId M2, SPIRVBasicBlock *BB) {
1108+
return BB->addInstruction(
1109+
new SPIRVMatrixTimesMatrix(TheType, getId(), M1, M2, BB));
1110+
}
1111+
11021112
SPIRVInstruction *
11031113
SPIRVModuleImpl::addGroupInst(Op OpCode, SPIRVType *Type, Scope Scope,
11041114
const std::vector<SPIRVValue *> &Ops,

llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -386,6 +386,9 @@ class SPIRVModule {
386386
SPIRVId TheMatrix,
387387
SPIRVId TheVector,
388388
SPIRVBasicBlock *BB) = 0;
389+
virtual SPIRVInstruction *addMatrixTimesMatrixInst(SPIRVType *TheType,
390+
SPIRVId M1, SPIRVId M2,
391+
SPIRVBasicBlock *BB) = 0;
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virtual SPIRVInstruction *addUnaryInst(Op, SPIRVType *, SPIRVValue *,
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SPIRVBasicBlock *) = 0;
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virtual SPIRVInstruction *addVariable(SPIRVType *, bool, SPIRVLinkageTypeKind,

llvm-spirv/test/OpNoLine.spvasm

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; REQUIRES: spirv-as
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; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
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; RUN: llvm-spirv -r -o - %t.spv | llvm-dis | FileCheck %s
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OpCapability Addresses
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OpCapability Kernel
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OpMemoryModel Physical32 OpenCL
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OpEntryPoint Kernel %1 "testNoLine"
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%void = OpTypeVoid
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%uint = OpTypeInt 32 0
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%5 = OpTypeFunction %void
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%1 = OpFunction %void None %5
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%6 = OpLabel
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OpNoLine
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OpReturn
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OpFunctionEnd
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; CHECK-LABEL: @testNoLine
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; CHECK-NEXT: ret

llvm-spirv/test/OpNop.spvasm

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; REQUIRES: spirv-as
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; TODO: OpNop cannot currently be decoded
3-
; XFAIL: *
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; RUN: spirv-as --target-env spv1.0 -o %t.spv %s
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; RUN: llvm-spirv -r -o - %t.spv | llvm-dis | FileCheck %s
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OpCapability Addresses

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