[SYCL][DOC] Move proposed FPGA extensions (#5453)

These two extension specifications are proposed changes to existing
extensions.  Move them to the "proposed" directory.  You can see the
proposed changes via:

```
$ git diff HEAD:sycl/doc/extensions/{supported,proposed}/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc
$ git diff HEAD:sycl/doc/extensions/{supported,proposed}/SYCL_EXT_INTEL_FPGA_LSU.md
```

Author: gmlueck

sycl/doc/extensions/DataFlowPipes/data_flow_pipes_rev4_proposed.asciidoc renamed to sycl/doc/extensions/proposed/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc

@@ -17,7 +17,11 @@
 :language: {basebackend@docbook:c++:cpp}
 
 == Introduction
-IMPORTANT: This specification is a draft.
+IMPORTANT: This is a proposed update to an existing extension.  The APIs
+described in this document are not yet implemented and cannot be used in
+application code.  See
+link:../supported/SYCL_EXT_INTEL_DATAFLOW_PIPES.asciidoc[here] for the existing
+extension, which is implemented.
 
 NOTE: Khronos(R) is a registered trademark and SYCL(TM) and SPIR(TM) are trademarks of The Khronos Group Inc.  OpenCL(TM) is a trademark of Apple Inc. used by permission by Khronos.
 

sycl/doc/extensions/IntelFPGA/FPGALsu_rev2_proposed.md renamed to sycl/doc/extensions/proposed/SYCL_EXT_INTEL_FPGA_LSU.md

@@ -1,6 +1,13 @@
 
 # FPGA lsu
 
+**IMPORTANT:** This is a proposed update to an existing extension.  The APIs
+described in this document are not yet implemented and cannot be used in
+application code.  See [here][1] for the existing extension, which is
+implemented.
+
+[1]: <../supported/SYCL_EXT_INTEL_FPGA_LSU.md>
+
 The Intel FPGA `lsu` class is implemented in `sycl/ext/intel/fpga_lsu.hpp` which
 is included in `sycl/ext/intel/fpga_extensions.hpp`.