|
31 | 31 | // CHK-FPGA-LINK: clang-offload-bundler{{.*}} "-type=o" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUT:.+\.o]]" "-outputs=[[OUTPUT1:.+\.o]]" "-unbundle"
|
32 | 32 | // CHK-FPGA-LINK-NOT: clang-offload-bundler{{.*}}
|
33 | 33 | // CHK-FPGA-LINK: llvm-link{{.*}} "[[OUTPUT1]]" "-o" "[[OUTPUT2_1:.+\.bc]]"
|
34 |
| -// CHK-FPGA-LINK: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[OUTPUT2:.+\.bc]]" "[[OUTPUT2_1]]" |
35 |
| -// CHK-FPGA-LINK: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2]]" |
| 34 | +// CHK-FPGA-LINK: sycl-post-link{{.*}} "-emit-param-info" "-symbols" "-spec-const=default" "-o" "[[OUTPUT2:.+\.table]]" "[[OUTPUT2_1]]" |
| 35 | +// CHK-FPGA-LINK: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT2_2:.+\.txt]]" "[[OUTPUT2]]" |
| 36 | +// CHK-FPGA-LINK: llvm-foreach{{.*}} "--in-file-list=[[OUTPUT2_2]]" {{.*}}llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_2]]" |
36 | 37 | // CHK-FPGA-EARLY: aoc{{.*}} "-o" "[[OUTPUT4:.+\.aocr]]" "[[OUTPUT3]]" "-sycl" "-rtl"
|
37 | 38 | // CHK-FPGA-IMAGE: aoc{{.*}} "-o" "[[OUTPUT5:.+\.aocx]]" "[[OUTPUT3]]" "-sycl"
|
38 | 39 | // CHK-FPGA-LINK: llvm-ar{{.*}} "cr" "libfoo.a" "[[INPUT]]"
|
|
57 | 58 | // CHK-FPGA-LINK-WIN: clang-offload-bundler{{.*}} "-type=o" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice{{.*}}" "-inputs=[[INPUT:.+\.obj]]" "-outputs=[[OUTPUT1:.+\.obj]]" "-unbundle"
|
58 | 59 | // CHK-FPGA-LINK-WIN-NOT: clang-offload-bundler{{.*}}
|
59 | 60 | // CHK-FPGA-LINK-WIN: llvm-link{{.*}} "[[OUTPUT1]]" "-o" "[[OUTPUT2_1:.+\.bc]]"
|
60 |
| -// CHK-FPGA-LINK-WIN: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[OUTPUT2:.+\.bc]]" "[[OUTPUT2_1]]" |
61 |
| -// CHK-FPGA-LINK-WIN: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2]]" |
| 61 | +// CHK-FPGA-LINK-WIN: sycl-post-link{{.*}} "-emit-param-info" "-symbols" "-spec-const=default" "-o" "[[OUTPUT2:.+\.table]]" "[[OUTPUT2_1]]" |
| 62 | +// CHK-FPGA-LINK-WIN: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT2_2:.+\.txt]]" "[[OUTPUT2]]" |
| 63 | +// CHK-FPGA-LINK-WIN: llvm-foreach{{.*}} "--in-file-list=[[OUTPUT2_2]]" {{.*}}llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_2]]" |
62 | 64 | // CHK-FPGA-LINK-WIN: aoc{{.*}} "-o" "[[OUTPUT5:.+\.aocr]]" "[[OUTPUT3]]" "-sycl" "-rtl"
|
63 | 65 | // CHK-FPGA-LINK-WIN: lib.exe{{.*}} "[[INPUT]]" {{.*}} "-OUT:libfoo.lib"
|
64 | 66 |
|
|
202 | 204 | // CHK-FPGA-LINK-SRC: 9: linker, {8}, archive, (host-sycl)
|
203 | 205 | // CHK-FPGA-LINK-SRC: 10: compiler, {3}, ir, (device-sycl)
|
204 | 206 | // CHK-FPGA-LINK-SRC: 11: linker, {10}, ir, (device-sycl)
|
205 |
| -// CHK-FPGA-LINK-SRC: 12: sycl-post-link, {11}, ir, (device-sycl) |
206 |
| -// CHK-FPGA-LINK-SRC: 13: llvm-spirv, {12}, spirv, (device-sycl) |
207 |
| -// CHK-FPGA-LINK-SRC: 14: backend-compiler, {13}, fpga_aocr, (device-sycl) |
208 |
| -// CHK-FPGA-LINK-SRC: 15: clang-offload-wrapper, {14}, object, (device-sycl) |
209 |
| -// CHK-FPGA-LINK-SRC-DEFAULT: 16: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {15}, archive |
210 |
| -// CHK-FPGA-LINK-SRC-CL: 16: offload, "host-sycl (x86_64-pc-windows-msvc)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {15}, archive |
| 207 | +// CHK-FPGA-LINK-SRC: 12: sycl-post-link, {11}, tempfiletable, (device-sycl) |
| 208 | +// CHK-FPGA-LINK-SRC: 13: file-table-tform, {12}, tempfilelist, (device-sycl) |
| 209 | +// CHK-FPGA-LINK-SRC: 14: llvm-spirv, {13}, tempfilelist, (device-sycl) |
| 210 | +// CHK-FPGA-LINK-SRC: 15: backend-compiler, {14}, fpga_aocr, (device-sycl) |
| 211 | +// CHK-FPGA-LINK-SRC: 16: file-table-tform, {12, 15}, tempfiletable, (device-sycl) |
| 212 | +// CHK-FPGA-LINK-SRC: 17: clang-offload-wrapper, {16}, object, (device-sycl) |
| 213 | +// CHK-FPGA-LINK-SRC-DEFAULT: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {17}, archive |
| 214 | +// CHK-FPGA-LINK-SRC-CL: 18: offload, "host-sycl (x86_64-pc-windows-msvc)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {17}, archive |
211 | 215 |
|
212 | 216 | /// -fintelfpga with -reuse-exe=
|
213 | 217 | // RUN: touch %t.cpp
|
|
283 | 287 | // CHK-FPGA-DEP-FILES-OBJ-PHASES: 1: clang-offload-unbundler, {0}, object, (host-sycl)
|
284 | 288 | // CHK-FPGA-DEP-FILES-OBJ-PHASES: 2: linker, {1}, image, (host-sycl)
|
285 | 289 | // CHK-FPGA-DEP-FILES-OBJ-PHASES: 3: linker, {1}, ir, (device-sycl)
|
286 |
| -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 4: sycl-post-link, {3}, ir, (device-sycl) |
287 |
| -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 5: llvm-spirv, {4}, spirv, (device-sycl) |
288 |
| -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 6: clang-offload-unbundler, {0}, fpga_dependencies |
289 |
| -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 7: backend-compiler, {5, 6}, fpga_aocx, (device-sycl) |
290 |
| -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 8: clang-offload-wrapper, {7}, object, (device-sycl) |
291 |
| -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 9: offload, "host-sycl (x86_64-{{unknown-linux-gnu|pc-windows-msvc}})" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {8}, image |
| 290 | +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 4: sycl-post-link, {3}, tempfiletable, (device-sycl) |
| 291 | +// CHK-FPGA-DEP-FILES-OBJ-PHASES 5: file-table-tform, {4}, tempfilelist, (device-sycl) |
| 292 | +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 6: llvm-spirv, {5}, tempfilelist, (device-sycl) |
| 293 | +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 7: clang-offload-unbundler, {0}, fpga_dependencies |
| 294 | +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 8: backend-compiler, {6, 7}, fpga_aocx, (device-sycl) |
| 295 | +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 9: file-table-tform, {4, 8}, tempfiletable, (device-sycl) |
| 296 | +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 10: clang-offload-wrapper, {9}, object, (device-sycl) |
| 297 | +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 11: offload, "host-sycl (x86_64-{{unknown-linux-gnu|pc-windows-msvc}})" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {10}, image |
292 | 298 |
|
293 | 299 | /// -fintelfpga output report file test
|
294 | 300 | // RUN: mkdir -p %t_dir
|
|
366 | 372 | // CHK-FPGA-AOCO-PHASES: 13: partial-link, {9, 12}, object
|
367 | 373 | // CHK-FPGA-AOCO-PHASES: 14: clang-offload-unbundler, {13}, object
|
368 | 374 | // CHK-FPGA-AOCO-PHASES: 15: linker, {11, 14}, ir, (device-sycl)
|
369 |
| -// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, ir, (device-sycl) |
370 |
| -// CHK-FPGA-AOCO-PHASES: 17: llvm-spirv, {16}, spirv, (device-sycl) |
371 |
| -// CHK-FPGA-AOCO-PHASES: 18: input, "[[INPUTA]]", fpga_aoco |
372 |
| -// CHK-FPGA-AOCO-PHASES: 19: clang-offload-unbundler, {18}, fpga_aoco |
373 |
| -// CHK-FPGA-AOCO-PHASES: 20: backend-compiler, {17, 19}, fpga_aocx, (device-sycl) |
374 |
| -// CHK-FPGA-AOCO-PHASES: 21: clang-offload-wrapper, {20}, object, (device-sycl) |
375 |
| -// CHK-FPGA-AOCO-PHASES: 22: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {21}, image |
| 375 | +// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, tempfiletable, (device-sycl) |
| 376 | +// CHK-FPGA-AOCO-PHASES: 17: file-table-tform, {16}, tempfilelist, (device-sycl) |
| 377 | +// CHK-FPGA-AOCO-PHASES: 18: llvm-spirv, {17}, tempfilelist, (device-sycl) |
| 378 | +// CHK-FPGA-AOCO-PHASES: 19: input, "[[INPUTA]]", fpga_aoco |
| 379 | +// CHK-FPGA-AOCO-PHASES: 20: clang-offload-unbundler, {19}, fpga_aoco |
| 380 | +// CHK-FPGA-AOCO-PHASES: 21: backend-compiler, {18, 20}, fpga_aocx, (device-sycl) |
| 381 | +// CHK-FPGA-AOCO-PHASES: 22: file-table-tform, {16, 21}, tempfiletable, (device-sycl) |
| 382 | +// CHK-FPGA-AOCO-PHASES: 23: clang-offload-wrapper, {22}, object, (device-sycl) |
| 383 | +// CHK-FPGA-AOCO-PHASES: 24: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image |
376 | 384 |
|
377 | 385 | /// FPGA AOCO Windows phases check
|
378 | 386 | // RUN: %clang_cl -fsycl -fintelfpga -foffload-static-lib=%t_aoco_cl.a %s -### -ccc-print-phases 2>&1 \
|
|
392 | 400 | // CHK-FPGA-AOCO-PHASES-WIN: 12: input, "[[INPUTA:.+\.a]]", archive
|
393 | 401 | // CHK-FPGA-AOCO-PHASES-WIN: 13: clang-offload-unbundler, {12}, archive
|
394 | 402 | // CHK-FPGA-AOCO-PHASES-WIN: 14: linker, {11, 13}, ir, (device-sycl)
|
395 |
| -// CHK-FPGA-AOCO-PHASES-WIN: 15: sycl-post-link, {14}, ir, (device-sycl) |
396 |
| -// CHK-FPGA-AOCO-PHASES-WIN: 16: llvm-spirv, {15}, spirv, (device-sycl) |
397 |
| -// CHK-FPGA-AOCO-PHASES-WIN: 17: input, "[[INPUTA]]", fpga_aoco |
398 |
| -// CHK-FPGA-AOCO-PHASES-WIN: 18: clang-offload-unbundler, {17}, fpga_aoco |
399 |
| -// CHK-FPGA-AOCO-PHASES-WIN: 19: backend-compiler, {16, 18}, fpga_aocx, (device-sycl) |
400 |
| -// CHK-FPGA-AOCO-PHASES-WIN: 20: clang-offload-wrapper, {19}, object, (device-sycl) |
401 |
| -// CHK-FPGA-AOCO-PHASES-WIN: 21: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {20}, image |
| 403 | +// CHK-FPGA-AOCO-PHASES-WIN: 15: sycl-post-link, {14}, tempfiletable, (device-sycl) |
| 404 | +// CHK-FPGA-AOCO-PHASES-WIN: 16: file-table-tform, {15}, tempfilelist, (device-sycl) |
| 405 | +// CHK-FPGA-AOCO-PHASES-WIN: 17: llvm-spirv, {16}, tempfilelist, (device-sycl) |
| 406 | +// CHK-FPGA-AOCO-PHASES-WIN: 18: input, "[[INPUTA]]", fpga_aoco |
| 407 | +// CHK-FPGA-AOCO-PHASES-WIN: 19: clang-offload-unbundler, {18}, fpga_aoco |
| 408 | +// CHK-FPGA-AOCO-PHASES-WIN: 20: backend-compiler, {17, 19}, fpga_aocx, (device-sycl) |
| 409 | +// CHK-FPGA-AOCO-PHASES-WIN: 21: file-table-tform, {15, 20}, tempfiletable, (device-sycl) |
| 410 | +// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-wrapper, {21}, object, (device-sycl) |
| 411 | +// CHK-FPGA-AOCO-PHASES-WIN: 23: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {22}, image |
402 | 412 |
|
403 | 413 | /// aoco test, checking tools
|
404 | 414 | // RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
|
|
415 | 425 | // CHK-FPGA-AOCO-LIN: clang-offload-bundler{{.*}} "-type=oo" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[PARTLINKOBJ]]" "-outputs={{.*}}" "-unbundle"
|
416 | 426 | // CHK-FPGA-AOCO-WIN: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs={{.*}}" "-unbundle"
|
417 | 427 | // CHK-FPGA-AOCO: llvm-link{{.*}} "@{{.*}}" "-o" "[[LINKEDBC:.+\.bc]]"
|
418 |
| -// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[PLINKEDBC:.+\.bc]]" "[[LINKEDBC]]" |
419 |
| -// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.spv]]" {{.*}} "[[PLINKEDBC]]" |
| 428 | +// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-emit-param-info" "-symbols" "-spec-const=default" "-o" "[[PLINKEDBC:.+\.table]]" "[[LINKEDBC]]" |
| 429 | +// CHK-FPGA-AOCO: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT_TFORM:.+\.txt]]" "[[PLINKEDBC]]" |
| 430 | +// CHK-FPGA-AOCO: llvm-foreach{{.*}} "--in-file-list=[[OUTPUT_TFORM]]" {{.*}}llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.txt]]" {{.*}} "[[OUTPUT_TFORM]]" |
420 | 431 | // CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB]]" "-outputs=[[AOCOLIST:.+\.txt]]" "-unbundle"
|
421 |
| -// CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl" |
422 |
| -// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[AOCXOUT]]" |
| 432 | +// CHK-FPGA-AOCO: llvm-foreach{{.*}} "--in-file-list=[[TARGSPV]]"{{.*}}"--out-file-list=[[AOC_OUT:.+\.aocx]]" {{.*}}aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl" |
| 433 | +// CHK-FPGA-AOCO: file-table-tform{{.*}} "-replace=Code,Code" "-o" "[[LAST_TABLE:.+\.table]]" "[[PLINKEDBC]]" "[[AOCXOUT]]" |
| 434 | +// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "-batch" "[[LAST_TABLE]]" |
423 | 435 | // CHK-FPGA-AOCO-LIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJL:.+\.o]]" "[[FINALBC]]"
|
424 | 436 | // CHK-FPGA-AOCO-WIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJW:.+\.obj]]" "[[FINALBC]]"
|
425 | 437 | // CHK-FPGA-AOCO-LIN: ld{{.*}} "[[INPUTLIB]]" {{.*}} "[[FINALOBJL]]"
|
|
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