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[Driver][SYCL][FPGA] Improve expected triple and link behaviors for AOCX files
When performing -fsycl-link=image behaviors on Windows, there was a mismatch of triples being used when checking for existence of the AOCX binary. This caused a problem when using clang-cl as the triples do not properly match. We also do not want to do any additional unbundling of any AOCX archive, which was causing a conflict of expected FPGA archives. Signed-off-by: Michael D Toguchi <[email protected]>
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clang/lib/Driver/Driver.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2534,12 +2534,18 @@ static bool runBundler(const SmallVectorImpl<StringRef> &BundlerArgs,
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bool hasFPGABinary(Compilation &C, std::string Object, types::ID Type) {
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assert(types::isFPGA(Type) && "unexpected Type for FPGA binary check");
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// Do not do the check if the file doesn't exist
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if (!llvm::sys::fs::exists(Object))
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return false;
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// Temporary names for the output.
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llvm::Triple TT;
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TT.setArchName(types::getTypeName(Type));
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TT.setVendorName("intel");
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TT.setOS(llvm::Triple::UnknownOS);
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TT.setEnvironment(llvm::Triple::SYCLDevice);
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if (C.getDriver().IsCLMode())
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TT.setObjectFormat(llvm::Triple::COFF);
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// Checking uses -check-section option with the input file, no output
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// file and the target triple being looked for.
@@ -4794,6 +4800,10 @@ void Driver::BuildActions(Compilation &C, DerivedArgList &Args,
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// archive unbundling for Windows.
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if (!isStaticArchiveFile(LA))
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continue;
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// FPGA AOCX files are archives, but we do not want to unbundle them here
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// as they have already been unbundled and processed for linking.
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if (hasFPGABinary(C, LA.str(), types::TY_FPGA_AOCX))
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continue;
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// In MSVC environment offload-static-libs are handled slightly different
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// because of missing support for partial linking in the linker. We add an
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// unbundling action for each static archive which produces list files with

clang/test/Driver/sycl-offload-intelfpga.cpp

Lines changed: 13 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -126,9 +126,12 @@
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// RUN: clang-offload-wrapper -o %t-aocx.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aocx-intel-unknown-sycldevice %t.aocx
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// RUN: llc -filetype=obj -o %t-aocx.o %t-aocx.bc
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// RUN: llvm-ar crv %t_aocx.a %t.o %t-aocx.o
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// RUN: clang-offload-wrapper -o %t-aocx_cl.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aocx-intel-unknown-sycldevice-coff %t.aocx
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// RUN: llc -filetype=obj -o %t-aocx_cl.o %t-aocx_cl.bc
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// RUN: llvm-ar crv %t_aocx_cl.a %t.o %t-aocx_cl.o
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// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t_aocx.a -ccc-print-phases 2>&1 \
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// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-PHASES %s
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// RUN: %clang_cl -fsycl -fintelfpga %t_aocx.a -ccc-print-phases 2>&1 \
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// RUN: %clang_cl -fsycl -fintelfpga %t_aocx_cl.a -ccc-print-phases 2>&1 \
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// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-PHASES %s
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// CHK-FPGA-AOCX-PHASES: 0: input, "{{.*}}", fpga_aocx, (host-sycl)
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// CHK-FPGA-AOCX-PHASES: 1: linker, {0}, image, (host-sycl)
@@ -138,9 +141,9 @@
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// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t_aocx.a -### 2>&1 \
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// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX,CHK-FPGA-AOCX-LIN %s
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// RUN: %clang_cl -fsycl -fintelfpga %t_aocx.a -### 2>&1 \
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// RUN: %clang_cl -fsycl -fintelfpga %t_aocx_cl.a -### 2>&1 \
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// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX,CHK-FPGA-AOCX-WIN %s
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// CHK-FPGA-AOCX: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
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// CHK-FPGA-AOCX: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice{{(-coff)?}}" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
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// CHK-FPGA-AOCX: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[BUNDLEOUT]]"
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// CHK-FPGA-AOCX-LIN: llc{{.*}} "-filetype=obj" "-o" "[[LLCOUT:.+\.o]]" "[[WRAPOUT]]"
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// CHK-FPGA-AOCX-WIN: llc{{.*}} "-filetype=obj" "-o" "[[LLCOUT2:.+\.obj]]" "[[WRAPOUT]]"
@@ -150,9 +153,9 @@
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/// AOCX with source
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// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %s %t_aocx.a -### 2>&1 \
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// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-SRC,CHK-FPGA-AOCX-SRC-LIN %s
153-
// RUN: %clang_cl -fsycl -fintelfpga %s %t_aocx.a -### 2>&1 \
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// RUN: %clang_cl -fsycl -fintelfpga %s %t_aocx_cl.a -### 2>&1 \
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// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-SRC,CHK-FPGA-AOCX-SRC-WIN %s
155-
// CHK-FPGA-AOCX-SRC: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
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// CHK-FPGA-AOCX-SRC: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice{{(-coff)?}}" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
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// CHK-FPGA-AOCX-SRC: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[BUNDLEOUT]]"
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// CHK-FPGA-AOCX-SRC: llc{{.*}} "-filetype=obj" "-o" "[[LLCOUT:.+\.(o|obj)]]" "[[WRAPOUT]]"
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// CHK-FPGA-AOCX-SRC: clang{{.*}} "-cc1" {{.*}} "-fsycl-is-device" {{.*}} "-o" "[[DEVICEBC:.+\.bc]]"
@@ -168,9 +171,9 @@
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// RUN: touch %t.o
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// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga %t.o %t_aocx.a -### 2>&1 \
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// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-OBJ,CHK-FPGA-AOCX-OBJ-LIN %s
171-
// RUN: %clang_cl -fsycl -fintelfpga %t.o %t_aocx.a -### 2>&1 \
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// RUN: %clang_cl -fsycl -fintelfpga %t.o %t_aocx_cl.a -### 2>&1 \
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// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCX-OBJ,CHK-FPGA-AOCX-OBJ-WIN %s
173-
// CHK-FPGA-AOCX-OBJ: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
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// CHK-FPGA-AOCX-OBJ: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aocx-intel-unknown-sycldevice{{(-coff)?}}" "-inputs=[[LIBINPUT:.+\.a]]" "-outputs=[[BUNDLEOUT:.+\.aocx]]" "-unbundle"
174177
// CHK-FPGA-AOCX-OBJ: clang-offload-wrapper{{.*}} "-o=[[WRAPOUT:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[BUNDLEOUT]]"
175178
// CHK-FPGA-AOCX-OBJ: llc{{.*}} "-filetype=obj" "-o" "[[LLCOUT:.+\.(o|obj)]]" "[[WRAPOUT]]"
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// CHK-FPGA-AOCX-OBJ: clang-offload-bundler{{.*}} "-type=o" {{.*}} "-outputs=[[HOSTOBJ:.+\.(o|obj)]],[[DEVICEOBJ:.+\.(o|obj)]]" "-unbundle"
@@ -332,8 +335,10 @@
332335
// RUN: %clang_cl -fsycl -c -o %t2_cl.o %t2.c
333336
// RUN: clang-offload-wrapper -o %t-aoco.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aoco-intel-unknown-sycldevice %t.aoco
334337
// RUN: llc -filetype=obj -o %t-aoco.o %t-aoco.bc
338+
// RUN: clang-offload-wrapper -o %t-aoco_cl.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aoco-intel-unknown-sycldevice-coff %t.aoco
339+
// RUN: llc -filetype=obj -o %t-aoco_cl.o %t-aoco_cl.bc
335340
// RUN: llvm-ar crv %t_aoco.a %t.o %t2.o %t-aoco.o
336-
// RUN: llvm-ar crv %t_aoco_cl.a %t.o %t2_cl.o %t-aoco.o
341+
// RUN: llvm-ar crv %t_aoco_cl.a %t.o %t2_cl.o %t-aoco_cl.o
337342
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a %s -### -ccc-print-phases 2>&1 \
338343
// RUN: | FileCheck -check-prefix=CHK-FPGA-AOCO-PHASES %s
339344
// CHK-FPGA-AOCO-PHASES: 0: input, "[[INPUTA:.+\.a]]", object, (host-sycl)
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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,60 @@
1+
//==--- fpga_aocx_win.cpp - AOT compilation for fpga using aoc with aocx ---==//
2+
//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// REQUIRES: aoc, accelerator
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// REQUIRES: system-windows
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/// E2E test for AOCX creation/use/run for FPGA
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// Produce an archive with device (AOCX) image
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// RUN: %clang_cl -fsycl -fintelfpga -fsycl-link=image -DDEVICE_PART %s -o %t_image_cl.a
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// Produce a host object
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// RUN: %clang_cl -fsycl -fintelfpga -DHOST_PART %s -c -o %t.o
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// AOCX with source
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// RUN: %clang_cl -fsycl -fintelfpga -DHOST_PART %s %t_image_cl.a -o %t_aocx_src.out
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// AOCX with object
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// RUN: %clang_cl -fsycl -fintelfpga %t.o %t_image_cl.a -o %t_aocx_obj.out
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//
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// RUN: env SYCL_DEVICE_TYPE=ACC %t_aocx_src.out
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// RUN: env SYCL_DEVICE_TYPE=ACC %t_aocx_obj.out
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#include "CL/sycl.hpp"
27+
#include <iostream>
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29+
using namespace cl::sycl;
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#ifdef DEVICE_PART
32+
33+
const double big[] = {3, 2, 1, 5, 6, 7};
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void foo(double &result, queue q, int x) {
35+
buffer<double> buf(&result, 1);
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buffer<double, 1> big_buf(big, sizeof(big) / sizeof(double));
37+
q.submit([&](handler &cgh) {
38+
auto acc = buf.get_access<access::mode::discard_write>(cgh);
39+
auto big_acc = big_buf.get_access<access::mode::read>(cgh);
40+
cgh.single_task<class test>([=]() {
41+
acc[0] = big_acc[x];
42+
});
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});
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}
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#endif // DEVICE_PART
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#ifdef HOST_PART
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50+
void foo(double &, queue q, int x);
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int main(void) {
53+
queue q(accelerator_selector{});
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55+
double result;
56+
foo(result, q, 3);
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std::cout << "Result: " << result << "\n";
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}
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#endif // HOST_PART

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