Regularize LLVM code to remove use of non standard integer types in fptoui and fptosi intrinsics (#2500)

* Regularize LLVM code to remove use of non standard integer types in fptoui and fptosi intrinsics

Signed-off-by: Sudarsanam, Arvind <[email protected]>

Original commit:
KhronosGroup/SPIRV-LLVM-Translator@14301c295d3dc8e

Author: asudarsa

llvm-spirv/lib/SPIRV/SPIRVRegularizeLLVM.cpp

@@ -321,6 +321,104 @@ void SPIRVRegularizeLLVMBase::expandSYCLTypeUsing(Module *M) {
     expandVIDWithSYCLTypeByValComp(F);
 }
 
+// In this function, we handle two conversion operations
+// 1. fptoui.sat.iX.fY (X is not 8,16,32,64; Y is 32 or 64)
+// 2. fptosi.sat.iX.fY (X is not 8,16,32,64; Y is 32 or 64)
+// Such non-standard integer types cannot be handled in SPIR-V. Hence, they
+// will be promoted to
+// 1. fptoui.sat.i64.fY (Y is 32 or 64)
+// 2. fptosi.sat.i64.fY (Y is 32 or 64)
+// However, LLVM documentation requires the following rules to be obeyed.
+// Rule 1: If the argument is any NaN, zero is returned.
+// Rule 2: If the argument is smaller than the smallest representable
+// (un)signed integer of the result type, the smallest representable
+// (un)signed integer is returned.
+// Rule 3: If the argument is larger than the largest representable (un)signed
+// integer of the result type, the largest representable (un)signed integer is
+// returned.
+// Rule 4: Otherwise, the result of rounding the argument towards zero is
+// returned.
+// Rules 1 & 4 are preserved when promoting iX to i64. For preserving Rule 2
+// and Rule 3, we saturate the result of the promoted instruction based on
+// original integer type (iX)
+// Example:
+// Input:
+// %0 = call i2 @llvm.fptosi.sat.i2.f32(float %input)
+// %1 = sext i32 %0
+// Output:
+// %0 = call i32 @_Z17convert_long_satf(float %input)
+// %1 = icmp sge i32 %0, 1 <Largest 2-bit signed integer>
+// %2 = icmp sle i32 %0, -2 <Smallest 2-bit signed integer>
+// %3 = select i1 %1, i32 1, i32 %0
+// %4 = select i1 %2, i32 -2, i32 %3
+// Replace uses of %1 in Input with %4 in Output
+void SPIRVRegularizeLLVMBase::cleanupConversionToNonStdIntegers(Module *M) {
+  for (auto FI = M->begin(), FE = M->end(); FI != FE;) {
+    Function *F = &(*FI++);
+    std::vector<Instruction *> ToErase;
+    auto IID = F->getIntrinsicID();
+    if (IID != Intrinsic::fptosi_sat && IID != Intrinsic::fptoui_sat)
+      continue;
+    for (auto *I : F->users()) {
+      if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
+        // TODO: Vector type not supported yet.
+        if (isa<VectorType>(II->getType()))
+          continue;
+        auto IID = II->getIntrinsicID();
+        auto IntBitWidth = II->getType()->getScalarSizeInBits();
+        if (IntBitWidth == 8 || IntBitWidth == 16 || IntBitWidth == 32 ||
+            IntBitWidth == 64)
+          continue;
+        if (IID == Intrinsic::fptosi_sat) {
+          // Identify sext (user of II). Make sure that's the only use of II.
+          auto *User = II->getUniqueUndroppableUser();
+          if (!User || !isa<SExtInst>(User))
+            continue;
+          auto *SExtI = dyn_cast<SExtInst>(User);
+          auto *NewIType = SExtI->getType();
+          IRBuilder<> IRB(II);
+          auto *NewII = IRB.CreateIntrinsic(
+              IID, {NewIType, II->getOperand(0)->getType()}, II->getOperand(0));
+          Constant *MaxVal = ConstantInt::get(
+              NewIType, APInt::getSignedMaxValue(IntBitWidth).getSExtValue());
+          Constant *MinVal = ConstantInt::get(
+              NewIType, APInt::getSignedMinValue(IntBitWidth).getSExtValue());
+          auto *GTMax = IRB.CreateICmp(CmpInst::ICMP_SGE, NewII, MaxVal);
+          auto *LTMin = IRB.CreateICmp(CmpInst::ICMP_SLE, NewII, MinVal);
+          auto *SatMax = IRB.CreateSelect(GTMax, MaxVal, NewII);
+          auto *SatMin = IRB.CreateSelect(LTMin, MinVal, SatMax);
+          SExtI->replaceAllUsesWith(SatMin);
+          ToErase.push_back(SExtI);
+          ToErase.push_back(II);
+        }
+        if (IID == Intrinsic::fptoui_sat) {
+          // Identify zext (user of II). Make sure that's the only use of II.
+          auto *User = II->getUniqueUndroppableUser();
+          if (!User || !isa<ZExtInst>(User))
+            continue;
+          auto *ZExtI = dyn_cast<ZExtInst>(User);
+          auto *NewIType = ZExtI->getType();
+          IRBuilder<> IRB(II);
+          auto *NewII = IRB.CreateIntrinsic(
+              IID, {NewIType, II->getOperand(0)->getType()}, II->getOperand(0));
+          Constant *MaxVal = ConstantInt::get(
+              NewIType, APInt::getMaxValue(IntBitWidth).getZExtValue());
+          auto *GTMax = IRB.CreateICmp(CmpInst::ICMP_UGE, NewII, MaxVal);
+          auto *SatMax = IRB.CreateSelect(GTMax, MaxVal, NewII);
+          ZExtI->replaceAllUsesWith(SatMax);
+          ToErase.push_back(ZExtI);
+          ToErase.push_back(II);
+        }
+      }
+    }
+    for (Instruction *V : ToErase) {
+      assert(V->user_empty());
+      V->dropAllReferences();
+      V->eraseFromParent();
+    }
+  }
+}
+
 bool SPIRVRegularizeLLVMBase::runRegularizeLLVM(Module &Module) {
   M = &Module;
   Ctx = &M->getContext();
@@ -464,6 +562,7 @@ void regularizeWithOverflowInstrinsics(StringRef MangledName, CallInst *Call,
 bool SPIRVRegularizeLLVMBase::regularize() {
   eraseUselessFunctions(M);
   expandSYCLTypeUsing(M);
+  cleanupConversionToNonStdIntegers(M);
 
   for (auto &GV : M->globals()) {
     SPIRVBuiltinVariableKind Kind;

llvm-spirv/lib/SPIRV/SPIRVRegularizeLLVM.h

@@ -91,6 +91,12 @@ class SPIRVRegularizeLLVMBase {
   void expandVEDWithSYCLTypeSRetArg(llvm::Function *F);
   void expandVIDWithSYCLTypeByValComp(llvm::Function *F);
 
+  // It is possible that incoming LLVM IR conversion instructions convert
+  // floating point to non-standard integer types. Such types are not supported
+  // in SPIR-V. This function cleans up such code and removes occurence of
+  // non-standard integer types.
+  void cleanupConversionToNonStdIntegers(llvm::Module *M);
+
   // According to the specification, the operands of a shift instruction must be
   // a scalar/vector of integer. When LLVM-IR contains a shift instruction with
   // i1 operands, they are treated as a bool. We need to extend them to i32 to

llvm-spirv/test/llvm-intrinsics/fp_to_arbitrary_size_int_intrinsic.ll

@@ -0,0 +1,57 @@
+;; Ensure @llvm.fptosi.sat.* and @llvm.fptoui.sat.* intrinsics are translated
+
+; RUN: llvm-as %s -o %t.bc
+; RUN: llvm-spirv %t.bc -spirv-text -o - | FileCheck %s --check-prefix=CHECK-SPIRV
+; RUN: llvm-spirv %t.bc -o %t.spv
+; RUN: spirv-val %t.spv
+; RUN: llvm-spirv -r %t.spv -o %t.rev.bc
+; RUN: llvm-dis < %t.rev.bc | FileCheck %s --check-prefix=CHECK-LLVM
+
+target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64"
+target triple = "spir64-unknown-unknown"
+
+; CHECK-SPIRV-DAG: Capability Kernel
+; CHECK-SPIRV-DAG: Decorate [[SAT1:[0-9]+]] SaturatedConversion
+; CHECK-SPIRV-DAG: Decorate [[SAT2:[0-9]+]] SaturatedConversion
+
+; CHECK-SPIRV-DAG: TypeInt [[INT64TY:[0-9]+]] 64
+; CHECK-SPIRV-DAG: TypeBool [[BOOLTY:[0-9]+]]
+; CHECK-SPIRV-DAG: Constant [[INT64TY]] [[I2SMAX:[0-9]+]] 1
+; CHECK-SPIRV-DAG: Constant [[INT64TY]] [[I2SMIN:[0-9]+]] 4294967294 
+; CHECK-SPIRV-DAG: ConvertFToS [[INT64TY]] [[SAT1]]
+; CHECK-SPIRV-DAG: SGreaterThanEqual [[BOOLTY]] [[SGERES:[0-9]+]] [[SAT1]] [[I2SMAX]]
+; CHECK-SPIRV-DAG: SLessThanEqual [[BOOLTY]] [[SLERES:[0-9]+]] [[SAT1]] [[I2SMIN]]
+; CHECK-SPIRV-DAG: Select [[INT64TY]] [[SELRES1:[0-9]+]] [[SGERES]] [[I2SMAX]] [[SAT1]]
+; CHECK-SPIRV-DAG: Select [[INT64TY]] [[SELRES2:[0-9]+]] [[SLERES]] [[I2SMIN]] [[SELRES1]]
+
+; CHECK-LLVM-DAG: define spir_kernel
+; CHECK-LLVM-DAG: %[[R1:[0-9]+]] = {{.*}} i64 {{.*}}convert_long_satf(float %input)
+; CHECK-LLVM-DAG: %[[R2:[0-9]+]] = icmp sge i64 %[[R1]], 1
+; CHECK-LLVM-DAG: %[[R3:[0-9]+]] = icmp sle i64 %[[R1]], -2
+; CHECK-LLVM-DAG: %[[R4:[0-9]+]] = select i1 %[[R2]], i64 1, i64 %[[R1]]
+; CHECK-LLVM-DAG: %[[R5:[0-9]+]] = select i1 %[[R3]], i64 -2, i64 %[[R4]]
+
+define spir_kernel void @testfunction_float_to_signed_i2(float %input) {
+entry:
+   %0 = call i2 @llvm.fptosi.sat.i2.f32(float %input)
+   %1 = sext i2 %0 to i64
+   ret void
+}
+declare i2 @llvm.fptosi.sat.i2.f32(float)
+
+; CHECK-SPIRV-DAG: Constant [[INT64TY]] [[I2UMAX:[0-9]+]] 3 
+; CHECK-SPIRV-DAG: ConvertFToU [[INT64TY]] [[SAT2]]
+; CHECK-SPIRV-DAG: UGreaterThanEqual [[BOOLTY]] [[UGERES:[0-9]+]] [[SAT2]] [[I2UMAX]]
+; CHECK-SPIRV-DAG: Select [[INT64TY]] [[SELRES1U:[0-9]+]] [[UGERES]] [[I2UMAX]] [[SAT2]]
+; CHECK-LLVM-DAG: define spir_kernel
+; CHECK-LLVM-DAG: %[[R1:[0-9]+]] = {{.*}} i64 {{.*}}convert_ulong_satf(float %input)
+; CHECK-LLVM-DAG: %[[R2:[0-9]+]] = icmp uge i64 %[[R1]], 3
+; CHECK-LLVM-DAG: %[[R3:[0-9]+]] = select i1 %[[R2]], i64 3, i64 %[[R1]]
+
+define spir_kernel void @testfunction_float_to_unsigned_i2(float %input) {
+entry:
+   %0 = call i2 @llvm.fptoui.sat.i2.f32(float %input)
+   %1 = zext i2 %0 to i64
+   ret void
+}
+declare i2 @llvm.fptoui.sat.i2.f32(float)