|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
| 2 | +; RUN: opt < %s -LowerWGScope -verify -S | FileCheck %s |
| 3 | + |
| 4 | +target triple = "nvptx64-nvidia-cuda-sycldevice" |
| 5 | + |
| 6 | +%struct.baz = type { i8 } |
| 7 | +%struct.spam = type { %struct.wobble, %struct.wobble, %struct.wobble, %struct.wombat.0 } |
| 8 | +%struct.wobble = type { %struct.wombat } |
| 9 | +%struct.wombat = type { [1 x i64] } |
| 10 | +%struct.wombat.0 = type { %struct.wombat } |
| 11 | +%struct.quux = type { i8 } |
| 12 | + |
| 13 | +; CHECK: @[[SHADOW:[a-zA-Z0-9]+]] = internal unnamed_addr addrspace(3) global %struct.spam undef |
| 14 | + |
| 15 | +define internal void @wobble(%struct.baz* %arg, %struct.spam* byval(%struct.spam) %arg1) !work_group_scope !0 { |
| 16 | +; CHECK: [[TMP10:%.*]] = bitcast %struct.spam* [[ARG1:%.*]] to i8* |
| 17 | +; CHECK: call void @llvm.memcpy.p3i8.p0i8.i64(i8 addrspace(3)* align 16 bitcast (%struct.spam addrspace(3)* @[[SHADOW]] to i8 addrspace(3)*), i8* [[TMP10]], i64 32, i1 false) |
| 18 | +; CHECK: call void @widget(%struct.spam* addrspacecast (%struct.spam addrspace(3)* @[[SHADOW]] to %struct.spam*), %struct.quux* byval(%struct.quux) [[TMP2:%.*]]) |
| 19 | +; |
| 20 | +bb: |
| 21 | + %tmp = alloca %struct.baz* |
| 22 | + %tmp2 = alloca %struct.quux |
| 23 | + store %struct.baz* %arg, %struct.baz** %tmp |
| 24 | + %tmp3 = load %struct.baz*, %struct.baz** %tmp |
| 25 | + call void @widget(%struct.spam* %arg1, %struct.quux* byval(%struct.quux) %tmp2) |
| 26 | + ret void |
| 27 | +} |
| 28 | + |
| 29 | +define internal void @widget(%struct.spam* %arg, %struct.quux* byval(%struct.quux) %arg1) !work_item_scope !0 !parallel_for_work_item !0 { |
| 30 | +bb: |
| 31 | + ret void |
| 32 | +} |
| 33 | + |
| 34 | +!0 = !{} |
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