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1 parent 141d723 commit cadd800Copy full SHA for cadd800
sycl/test-e2e/ESIMD/regression/bit_shift_vector_compilation_test.cpp
@@ -6,13 +6,12 @@
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//
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//===---------------------------------------===//
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-// RUN: %{build} -fsycl-device-code-split=per_kernel -std=c++20 -o %t.out
+// RUN: %{build} -fsycl-device-code-split=per_kernel -o %t.out
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// RUN: %{run} %t.out
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// This is a basic test to validate the vector bit shifting functions.
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#include "../esimd_test_utils.hpp"
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-#include <bit>
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using namespace sycl;
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using namespace sycl::ext::intel::esimd;
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