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[SYCL][Driver] Add support for FPGA device libs in fat static libs (#905)
Introduces a new FPGA type of aoco, which is used to represent the library. When found in a fat static lib, this section is unbundled and added to the aoc compilation step. Only used with -foffload-static-lib=lib Signed-off-by: Michael D Toguchi <[email protected]>
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10 files changed

+152
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clang/include/clang/Driver/Action.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -683,6 +683,7 @@ class BackendCompileJobAction : public JobAction {
683683
void anchor() override;
684684

685685
public:
686+
BackendCompileJobAction(ActionList &Inputs, types::ID OutputType);
686687
BackendCompileJobAction(Action *Input, types::ID OutputType);
687688

688689
static bool classof(const Action *A) {

clang/include/clang/Driver/Types.def

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -104,7 +104,9 @@ TYPE("sycl-header", SYCL_Header, INVALID, "h", phases
104104
TYPE("sycl-fatbin", SYCL_FATBIN, INVALID, nullptr, phases::Compile, phases::Backend, phases::Assemble, phases::Link)
105105
TYPE("tempfilelist", Tempfilelist, INVALID, "txt", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
106106
TYPE("tempentriesfilelist", TempEntriesfilelist, INVALID, "txt", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
107+
TYPE("tempAOCOfilelist", TempAOCOfilelist, INVALID, "txt", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
107108
TYPE("archive", Archive, INVALID, "a", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
108-
TYPE("fpga-aocx", FPGA_AOCX, INVALID, "aocx", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
109-
TYPE("fpga-aocr", FPGA_AOCR, INVALID, "aocr", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
109+
TYPE("fpga_aocx", FPGA_AOCX, INVALID, "aocx", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
110+
TYPE("fpga_aocr", FPGA_AOCR, INVALID, "aocr", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
111+
TYPE("fpga_aoco", FPGA_AOCO, INVALID, "aoco", phases::Compile, phases::Backend, phases::Assemble, phases::Link)
110112
TYPE("none", Nothing, INVALID, nullptr, phases::Compile, phases::Backend, phases::Assemble, phases::Link)

clang/include/clang/Driver/Types.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -81,6 +81,9 @@ namespace types {
8181
/// isHIP - Is this a HIP input.
8282
bool isHIP(ID Id);
8383

84+
/// isFPGA - Is this FPGA input.
85+
bool isFPGA(ID Id);
86+
8487
/// isObjC - Is this an "ObjC" input (Obj-C and Obj-C++ sources and headers).
8588
bool isObjC(ID Id);
8689

clang/lib/Driver/Action.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -452,6 +452,10 @@ SYCLPostLinkJobAction::SYCLPostLinkJobAction(Action *Input, types::ID Type)
452452

453453
void BackendCompileJobAction::anchor() {}
454454

455+
BackendCompileJobAction::BackendCompileJobAction(ActionList &Inputs,
456+
types::ID Type)
457+
: JobAction(BackendCompileJobClass, Inputs, Type) {}
458+
455459
BackendCompileJobAction::BackendCompileJobAction(Action *Input,
456460
types::ID Type)
457461
: JobAction(BackendCompileJobClass, Input, Type) {}

clang/lib/Driver/Driver.cpp

Lines changed: 49 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -3486,8 +3486,17 @@ class OffloadingActionBuilder final {
34863486
}
34873487
continue;
34883488
}
3489+
ActionList DeviceLibObjects;
3490+
ActionList LinkObjects;
3491+
for (const auto &Input : LI) {
3492+
// FPGA aoco does not go through the link, everything else does.
3493+
if (Input->getType() == types::TY_FPGA_AOCO)
3494+
DeviceLibObjects.push_back(Input);
3495+
else
3496+
LinkObjects.push_back(Input);
3497+
}
34893498
auto *DeviceLinkAction =
3490-
C.MakeAction<LinkJobAction>(LI, types::TY_LLVM_BC);
3499+
C.MakeAction<LinkJobAction>(LinkObjects, types::TY_LLVM_BC);
34913500
ActionList WrapperInputs;
34923501
Action *SPIRVInput = DeviceLinkAction;
34933502
types::ID OutType = types::TY_SPIRV;
@@ -3520,9 +3529,13 @@ class OffloadingActionBuilder final {
35203529
}
35213530
// Do the additional Ahead of Time compilation when the specific
35223531
// triple calls for it (provided a valid subarch).
3523-
auto *DeviceBECompileAction = C.MakeAction<BackendCompileJobAction>(
3524-
SPIRVTranslateAction, OutType);
3525-
3532+
Action *DeviceBECompileAction;
3533+
ActionList BEActionList;
3534+
BEActionList.push_back(SPIRVTranslateAction);
3535+
for (const auto &A : DeviceLibObjects)
3536+
BEActionList.push_back(A);
3537+
DeviceBECompileAction =
3538+
C.MakeAction<BackendCompileJobAction>(BEActionList, OutType);
35263539
WrapperInputs.push_back(DeviceBECompileAction);
35273540
auto *DeviceWrappingAction = C.MakeAction<OffloadWrapperJobAction>(
35283541
WrapperInputs, types::TY_Object);
@@ -3765,12 +3778,12 @@ class OffloadingActionBuilder final {
37653778
return C.MakeAction<OffloadAction>(HDep, DDeps);
37663779
}
37673780

3768-
bool HasFPGADeviceBinary(Compilation &C, std::string Object,
3769-
bool CheckAOCX = false) {
3781+
bool hasFPGABinary(Compilation &C, std::string Object, types::ID Type) {
3782+
assert(types::isFPGA(Type) && "unexpected Type for FPGA binary check");
37703783
// Temporary names for the output.
37713784
const ToolChain *OTC = C.getSingleOffloadToolChain<Action::OFK_SYCL>();
37723785
llvm::Triple TT;
3773-
TT.setArchName(CheckAOCX ? "fpga_aocx" : "fpga_aocr");
3786+
TT.setArchName(types::getTypeName(Type));
37743787
TT.setVendorName("intel");
37753788
TT.setOS(llvm::Triple(OTC->getTriple()).getOS());
37763789
TT.setEnvironment(llvm::Triple::SYCLDevice);
@@ -3783,9 +3796,8 @@ class OffloadingActionBuilder final {
37833796
Object);
37843797
// Always use -type=ao for aocx/aocr bundle checking. The 'bundles' are
37853798
// actually archives.
3786-
const char *Type = C.getArgs().MakeArgString("-type=ao");
37873799
std::vector<StringRef> BundlerArgs = { "clang-offload-bundler",
3788-
Type,
3800+
"-type=ao",
37893801
Targets,
37903802
Inputs,
37913803
"-check-section" };
@@ -3858,13 +3870,16 @@ class OffloadingActionBuilder final {
38583870
Action *A(HostAction);
38593871
// Only check for FPGA device information when using fpga SubArch.
38603872
if (Args.hasArg(options::OPT_fintelfpga) &&
3861-
HostAction->getType() != types::TY_FPGA_AOCR &&
3862-
HostAction->getType() != types::TY_FPGA_AOCX &&
38633873
!(HostAction->getType() == types::TY_Object &&
38643874
isObjectFile(InputName))) {
3865-
if (HasFPGADeviceBinary(C, InputArg->getAsString(Args), true))
3875+
// Type FPGA aoco is a special case for -foffload-static-lib.
3876+
if (HostAction->getType() == types::TY_FPGA_AOCO) {
3877+
if (!hasFPGABinary(C, InputName, types::TY_FPGA_AOCO))
3878+
return false;
3879+
A = C.MakeAction<InputAction>(*InputArg, types::TY_FPGA_AOCO);
3880+
} else if (hasFPGABinary(C, InputName, types::TY_FPGA_AOCX))
38663881
A = C.MakeAction<InputAction>(*InputArg, types::TY_FPGA_AOCX);
3867-
else if (HasFPGADeviceBinary(C, InputArg->getAsString(Args)))
3882+
else if (hasFPGABinary(C, InputName, types::TY_FPGA_AOCR))
38683883
A = C.MakeAction<InputAction>(*InputArg, types::TY_FPGA_AOCR);
38693884
}
38703885
HostActionList.push_back(A);
@@ -4369,22 +4384,29 @@ void Driver::BuildActions(Compilation &C, DerivedArgList &Args,
43694384
LinkerInputs.push_back(TLI);
43704385
}
43714386
const llvm::opt::OptTable &Opts = getOpts();
4372-
if (C.getDefaultToolChain().getTriple().isWindowsMSVCEnvironment() &&
4373-
Args.hasArg(options::OPT_foffload_static_lib_EQ)) {
4387+
for (const auto *A : Args.filtered(options::OPT_foffload_static_lib_EQ)) {
4388+
auto unbundleStaticLib = [&](types::ID T) {
4389+
Arg *InputArg = MakeInputArg(Args, Opts, A->getValue());
4390+
Action *Current = C.MakeAction<InputAction>(*InputArg, T);
4391+
OffloadBuilder.addHostDependenceToDeviceActions(Current, InputArg, Args);
4392+
OffloadBuilder.addDeviceDependencesToHostAction(
4393+
Current, InputArg, phases::Link, PL.back(), PL);
4394+
};
43744395
// In MSVC environment offload-static-libs are handled slightly different
43754396
// because of missing support for partial linking in the linker. We add an
43764397
// unbundling action for each static archive which produces list files with
43774398
// extracted objects. Device lists are then added to the appropriate device
43784399
// link actions and host list is ignored since we are adding
43794400
// offload-static-libs as normal libraries to the host link command.
4380-
for (const auto *A : Args.filtered(options::OPT_foffload_static_lib_EQ)) {
4381-
Arg *InputArg = MakeInputArg(Args, Opts, A->getValue());
4382-
Action *Current = C.MakeAction<InputAction>(*InputArg, types::TY_Archive);
4383-
OffloadBuilder.addHostDependenceToDeviceActions(Current, InputArg, Args);
4384-
OffloadBuilder.addDeviceDependencesToHostAction(
4385-
Current, InputArg, phases::Link, PL.back(), PL);
4386-
}
4401+
if (C.getDefaultToolChain().getTriple().isWindowsMSVCEnvironment())
4402+
unbundleStaticLib(types::TY_Archive);
4403+
// Pass along the -foffload-static-lib values to check if we need to
4404+
// add them for unbundling for FPGA AOT static lib usage. Uses FPGA
4405+
// aoco type to differentiate if aoco unbundling is needed.
4406+
if (Args.hasArg(options::OPT_fintelfpga))
4407+
unbundleStaticLib(types::TY_FPGA_AOCO);
43874408
}
4409+
43884410
// For an FPGA archive, we add the unbundling step above to take care of
43894411
// the device side, but also unbundle here to extract the host side
43904412
for (const auto &LI : LinkerInputs) {
@@ -5263,8 +5285,7 @@ InputInfo Driver::BuildJobsForActionNoCache(
52635285
C.addTempFile(C.getArgs().MakeArgString(TmpFileName),
52645286
types::TY_Tempfilelist);
52655287
CurI = InputInfo(types::TY_Tempfilelist, TmpFile, TmpFile);
5266-
} else if (JA->getType() == types::TY_FPGA_AOCX ||
5267-
JA->getType() == types::TY_FPGA_AOCR) {
5288+
} else if (types::isFPGA(JA->getType())) {
52685289
std::string Ext(types::getTypeTempSuffix(JA->getType()));
52695290
types::ID TI = types::TY_Object;
52705291
if (EffectiveTriple.getSubArch() == llvm::Triple::SPIRSubArch_fpga) {
@@ -5275,6 +5296,10 @@ InputInfo Driver::BuildJobsForActionNoCache(
52755296
// side isn't used
52765297
continue;
52775298
}
5299+
if (JA->getType() == types::TY_FPGA_AOCO) {
5300+
TI = types::TY_TempAOCOfilelist;
5301+
Ext = "txt";
5302+
}
52785303
} else if (EffectiveTriple.getSubArch() !=
52795304
llvm::Triple::SPIRSubArch_fpga) {
52805305
if (UI.DependentOffloadKind == Action::OFK_SYCL) {

clang/lib/Driver/ToolChains/Clang.cpp

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -6782,8 +6782,7 @@ void OffloadBundler::ConstructJob(Compilation &C, const JobAction &JA,
67826782
TCCheck->getTriple().getSubArch() == llvm::Triple::SPIRSubArch_fpga) {
67836783
Triples = "-targets=";
67846784
llvm::Triple TT;
6785-
TT.setArchName(JA.getInputs()[0]->getType() == types::TY_FPGA_AOCX
6786-
? "fpga_aocx" : "fpga_aocr");
6785+
TT.setArchName(types::getTypeName(JA.getInputs()[0]->getType()));
67876786
TT.setVendorName("intel");
67886787
TT.setOS(llvm::Triple(TCCheck->getTriple()).getOS());
67896788
TT.setEnvironment(llvm::Triple::SYCLDevice);
@@ -6882,8 +6881,9 @@ void OffloadBundler::ConstructJobMultipleOutputs(
68826881
else
68836882
TypeArg = "aoo";
68846883
}
6885-
if (C.getDefaultToolChain().getTriple().isWindowsMSVCEnvironment() &&
6886-
Input.getType() == types::TY_Archive)
6884+
if (Input.getType() == types::TY_FPGA_AOCO ||
6885+
(C.getDefaultToolChain().getTriple().isWindowsMSVCEnvironment() &&
6886+
Input.getType() == types::TY_Archive))
68876887
TypeArg = "aoo";
68886888

68896889
// Get the type.
@@ -6898,14 +6898,12 @@ void OffloadBundler::ConstructJobMultipleOutputs(
68986898
// FPGA device triples are 'transformed' for the bundler when creating
68996899
// aocx or aocr type bundles. Also, we only do a specific target
69006900
// unbundling, skipping the host side or device side.
6901-
if (Input.getType() == types::TY_FPGA_AOCX ||
6902-
Input.getType() == types::TY_FPGA_AOCR) {
6901+
if (types::isFPGA(Input.getType())) {
69036902
if (getToolChain().getTriple().getSubArch() ==
69046903
llvm::Triple::SPIRSubArch_fpga &&
69056904
Dep.DependentOffloadKind == Action::OFK_SYCL) {
69066905
llvm::Triple TT;
6907-
TT.setArchName(Input.getType() == types::TY_FPGA_AOCX ? "fpga_aocx"
6908-
: "fpga_aocr");
6906+
TT.setArchName(types::getTypeName(Input.getType()));
69096907
TT.setVendorName("intel");
69106908
TT.setOS(getToolChain().getTriple().getOS());
69116909
TT.setEnvironment(llvm::Triple::SYCLDevice);

clang/lib/Driver/ToolChains/SYCL.cpp

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -307,7 +307,12 @@ void SYCL::fpga::BackendCompiler::ConstructJob(Compilation &C,
307307
std::string Filename(II.getFilename());
308308
if (II.getType() == types::TY_Tempfilelist)
309309
ForeachInputs.push_back(II);
310-
CmdArgs.push_back(C.getArgs().MakeArgString(Filename));
310+
if (II.getType() == types::TY_TempAOCOfilelist)
311+
// Add any FPGA library lists. These come in as special tempfile lists.
312+
CmdArgs.push_back(Args.MakeArgString(Twine("-library-list=") +
313+
Filename));
314+
else
315+
CmdArgs.push_back(C.getArgs().MakeArgString(Filename));
311316
}
312317
CmdArgs.push_back("-sycl");
313318

clang/lib/Driver/Types.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,18 @@ bool types::isFortran(ID Id) {
223223
}
224224
}
225225

226+
bool types::isFPGA(ID Id) {
227+
switch (Id) {
228+
default:
229+
return false;
230+
231+
case TY_FPGA_AOCR:
232+
case TY_FPGA_AOCX:
233+
case TY_FPGA_AOCO:
234+
return true;
235+
}
236+
}
237+
226238
bool types::isSrcFile(ID Id) {
227239
return Id != TY_Object && getPreprocessedType(Id) != TY_INVALID;
228240
}

clang/test/Driver/sycl-offload-intelfpga.cpp

Lines changed: 64 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -127,7 +127,7 @@
127127
// CHK-FPGA-LINK-SRC: 12: assembler, {11}, object, (device-sycl)
128128
// CHK-FPGA-LINK-SRC: 13: linker, {12}, ir, (device-sycl)
129129
// CHK-FPGA-LINK-SRC: 14: llvm-spirv, {13}, spirv, (device-sycl)
130-
// CHK-FPGA-LINK-SRC: 15: backend-compiler, {14}, fpga-aocr, (device-sycl)
130+
// CHK-FPGA-LINK-SRC: 15: backend-compiler, {14}, fpga_aocr, (device-sycl)
131131
// CHK-FPGA-LINK-SRC: 16: clang-offload-wrapper, {15}, object, (device-sycl)
132132
// CHK-FPGA-LINK-SRC-DEFAULT: 17: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {16}, archive
133133
// CHK-FPGA-LINK-SRC-CL: 17: offload, "host-sycl (x86_64-pc-windows-msvc)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice-coff)" {16}, archive
@@ -159,5 +159,68 @@
159159
// RUN: | FileCheck -DOUTDIR=%t_dir -check-prefix=CHK-FPGA-REPORT-OPT %s
160160
// CHK-FPGA-REPORT-OPT: aoc{{.*}} "-sycl" {{.*}} "-output-report-folder=[[OUTDIR]]{{/|\\\\}}file.prj"
161161

162+
/// -fintelfpga static lib (aoco)
163+
// RUN: echo "Dummy AOCO image" > %t.aoco
164+
// RUN: echo "void foo() {}" > %t.c
165+
// RUN: %clang -c %t.c
166+
// RUN: clang-offload-wrapper -o %t-aoco.bc -host=x86_64-unknown-linux-gnu -kind=sycl -target=fpga_aoco-intel-unknown-sycldevice %t.aoco
167+
// RUN: llc -filetype=obj -o %t-aoco.o %t-aoco.bc
168+
// RUN: llvm-ar crv %t_aoco.a %t.o %t-aoco.o
169+
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -foffload-static-lib=%t_aocx.a %s -### -ccc-print-phases 2>&1 \
170+
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES,CHK-FPGA-AOCO-PHASES-LIN %s
171+
// RUN: %clang_cl -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a %s -### -ccc-print-phases 2>&1 \
172+
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO-PHASES,CHK-FPGA-AOCO-PHASES-WIN %s
173+
// CHK-FPGA-AOCO-PHASES: 0: input, "[[INPUT:.+\.cpp]]", c++, (host-sycl)
174+
// CHK-FPGA-AOCO-PHASES: 1: preprocessor, {0}, c++-cpp-output, (host-sycl)
175+
// CHK-FPGA-AOCO-PHASES: 2: input, "[[INPUT]]", c++, (device-sycl)
176+
// CHK-FPGA-AOCO-PHASES: 3: preprocessor, {2}, c++-cpp-output, (device-sycl)
177+
// CHK-FPGA-AOCO-PHASES: 4: compiler, {3}, sycl-header, (device-sycl)
178+
// CHK-FPGA-AOCO-PHASES-LIN: 5: offload, "host-sycl (x86_64-unknown-linux-gnu)" {1}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {4}, c++-cpp-output
179+
// CHK-FPGA-AOCO-PHASES-WIN: 5: offload, "host-sycl (x86_64-pc-windows-msvc)" {1}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice-coff)" {4}, c++-cpp-output
180+
// CHK-FPGA-AOCO-PHASES: 6: compiler, {5}, ir, (host-sycl)
181+
// CHK-FPGA-AOCO-PHASES: 7: backend, {6}, assembler, (host-sycl)
182+
// CHK-FPGA-AOCO-PHASES: 8: assembler, {7}, object, (host-sycl)
183+
// CHK-FPGA-AOCO-PHASES-LIN: 9: clang-offload-unbundler, {8}, object, (host-sycl)
184+
// CHK-FPGA-AOCO-PHASES-LIN: 10: linker, {9}, image, (host-sycl)
185+
// CHK-FPGA-AOCO-PHASES-LIN: 11: compiler, {3}, ir, (device-sycl)
186+
// CHK-FPGA-AOCO-PHASES-LIN: 12: backend, {11}, assembler, (device-sycl)
187+
// CHK-FPGA-AOCO-PHASES-LIN: 13: assembler, {12}, object, (device-sycl)
188+
// CHK-FPGA-AOCO-PHASES-LIN: 14: linker, {13, 9}, ir, (device-sycl)
189+
// CHK-FPGA-AOCO-PHASES-LIN: 15: llvm-spirv, {14}, spirv, (device-sycl)
190+
// CHK-FPGA-AOCO-PHASES-LIN: 16: backend-compiler, {15}, fpga_aocx, (device-sycl)
191+
// CHK-FPGA-AOCO-PHASES-LIN: 17: clang-offload-wrapper, {16}, object, (device-sycl)
192+
// CHK-FPGA-AOCO-PHASES-LIN: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {17}, image
193+
194+
// CHK-FPGA-AOCO-PHASES-WIN: 9: linker, {8}, image, (host-sycl)
195+
// CHK-FPGA-AOCO-PHASES-WIN: 10: compiler, {3}, ir, (device-sycl)
196+
// CHK-FPGA-AOCO-PHASES-WIN: 11: backend, {10}, assembler, (device-sycl)
197+
// CHK-FPGA-AOCO-PHASES-WIN: 12: assembler, {11}, object, (device-sycl)
198+
// CHK-FPGA-AOCO-PHASES-WIN: 13: input, "{{.*}}", archive
199+
// CHK-FPGA-AOCO-PHASES-WIN: 14: clang-offload-unbundler, {13}, archive
200+
// CHK-FPGA-AOCO-PHASES-WIN: 15: linker, {12, 14}, ir, (device-sycl)
201+
// CHK-FPGA-AOCO-PHASES-WIN: 16: llvm-spirv, {15}, spirv, (device-sycl)
202+
// CHK-FPGA-AOCO-PHASES-WIN: 17: backend-compiler, {16}, fpga_aocx, (device-sycl)
203+
// CHK-FPGA-AOCO-PHASES-WIN: 18: clang-offload-wrapper, {17}, object, (device-sycl)
204+
// CHK-FPGA-AOCO-PHASES-WIN: 19: offload, "host-sycl (x86_64-pc-windows-msvc)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice-coff)" {18}, image
205+
206+
/// aoco test, checking tools
207+
// RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
208+
// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-LIN %s
209+
// RUN: %clang_cl -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \
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// RUN: | FileCheck -check-prefixes=CHK-FPGA-AOCO,CHK-FPGA-AOCO-WIN %s
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// CHK-FPGA-AOCO-LIN: clang-offload-bundler{{.*}} "-type=ao" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-check-section"
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// CHK-FPGA-AOCO-LIN: ld{{.*}} "-r" "-o" "[[PARTLINKOBJ:.+\.o]]" {{.*}} "[[INPUTLIB]]"
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// CHK-FPGA-AOCO-LIN: clang-offload-bundler{{.*}} "-type=oo" "-targets=host-x86_64-unknown-linux-gnu,sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[PARTLINKOBJ]]" "-outputs=[[HOSTOBJLIB:.+\.o]],{{.*}}" "-unbundle"
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// CHK-FPGA-AOCO-WIN: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice-coff" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs={{.*}}" "-unbundle"
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// CHK-FPGA-AOCO: llvm-link{{.*}} "@{{.*}}" "-o" "[[LINKEDBC:.+\.bc]]"
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// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.spv]]" {{.*}} "[[LINKEDBC]]"
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// CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB]]" "-outputs=[[AOCOLIST:.+\.txt]]" "-unbundle"
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// CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl"
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// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[AOCXOUT]]"
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// CHK-FPGA-AOCO-LIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJL:.+\.o]]" "[[FINALBC]]"
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// CHK-FPGA-AOCO-WIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJW:.+\.obj]]" "[[FINALBC]]"
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// CHK-FPGA-AOCO-LIN: ld{{.*}} "[[HOSTOBJLIB]]" "[[FINALOBJL]]"
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// CHK-FPGA-AOCO-WIN: link.exe{{.*}} "-defaultlib:[[INPUTLIB]]" {{.*}} "[[FINALOBJW]]"
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// TODO: SYCL specific fail - analyze and enable
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// XFAIL: windows-msvc

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