Skip to content

Commit d5c4a9f

Browse files
[sycl-rel] Add BMG G31 and WCL to sycl_ext_oneapi_device_architecture (#18902)
Cherry-pick of - #18890
1 parent 207da46 commit d5c4a9f

File tree

8 files changed

+56
-2
lines changed

8 files changed

+56
-2
lines changed

clang/lib/Driver/ToolChains/SYCL.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1490,9 +1490,11 @@ StringRef SYCL::gen::resolveGenDevice(StringRef DeviceName) {
14901490
.Cases("intel_gpu_mtl_h", "intel_gpu_12_71_4", "mtl_h")
14911491
.Cases("intel_gpu_arl_h", "intel_gpu_12_74_4", "arl_h")
14921492
.Cases("intel_gpu_bmg_g21", "intel_gpu_20_1_4", "bmg_g21")
1493+
.Cases("intel_gpu_bmg_g31", "intel_gpu_20_2_0", "bmg_g31")
14931494
.Cases("intel_gpu_lnl_m", "intel_gpu_20_4_4", "lnl_m")
14941495
.Cases("intel_gpu_ptl_h", "intel_gpu_30_0_4", "ptl_h")
14951496
.Cases("intel_gpu_ptl_u", "intel_gpu_30_1_1", "ptl_u")
1497+
.Cases("intel_gpu_wcl", "intel_gpu_30_3_0", "wcl")
14961498
.Case("nvidia_gpu_sm_50", "sm_50")
14971499
.Case("nvidia_gpu_sm_52", "sm_52")
14981500
.Case("nvidia_gpu_sm_53", "sm_53")
@@ -1582,9 +1584,11 @@ SmallString<64> SYCL::gen::getGenDeviceMacro(StringRef DeviceName) {
15821584
.Case("mtl_h", "INTEL_GPU_MTL_H")
15831585
.Case("arl_h", "INTEL_GPU_ARL_H")
15841586
.Case("bmg_g21", "INTEL_GPU_BMG_G21")
1587+
.Case("bmg_g31", "INTEL_GPU_BMG_G31")
15851588
.Case("lnl_m", "INTEL_GPU_LNL_M")
15861589
.Case("ptl_h", "INTEL_GPU_PTL_H")
15871590
.Case("ptl_u", "INTEL_GPU_PTL_U")
1591+
.Case("wcl", "INTEL_GPU_WCL")
15881592
.Case("sm_50", "NVIDIA_GPU_SM_50")
15891593
.Case("sm_52", "NVIDIA_GPU_SM_52")
15901594
.Case("sm_53", "NVIDIA_GPU_SM_53")

clang/test/Driver/sycl-oneapi-gpu-intelgpu.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -148,6 +148,10 @@
148148
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g21 -DMAC_STR=BMG_G21
149149
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_20_1_4 -### %s 2>&1 | \
150150
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g21 -DMAC_STR=BMG_G21
151+
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_bmg_g31 -### %s 2>&1 | \
152+
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g31 -DMAC_STR=BMG_G31
153+
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_20_2_0 -### %s 2>&1 | \
154+
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=bmg_g31 -DMAC_STR=BMG_G31
151155
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_lnl_m -### %s 2>&1 | \
152156
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=lnl_m -DMAC_STR=LNL_M
153157
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_20_4_4 -### %s 2>&1 | \
@@ -160,6 +164,10 @@
160164
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ptl_u -DMAC_STR=PTL_U
161165
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_30_1_1 -### %s 2>&1 | \
162166
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=ptl_u -DMAC_STR=PTL_U
167+
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_wcl -### %s 2>&1 | \
168+
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=wcl -DMAC_STR=WCL
169+
// RUN: %clangxx -fsycl -fsycl-targets=intel_gpu_30_3_0 -### %s 2>&1 | \
170+
// RUN: FileCheck %s --check-prefixes=DEVICE,MACRO -DDEV_STR=wcl -DMAC_STR=WCL
163171
// MACRO: clang{{.*}} "-triple" "spir64_gen-unknown-unknown"
164172
// MACRO: "-D__SYCL_TARGET_INTEL_GPU_[[MAC_STR]]__"
165173
// MACRO: clang{{.*}} "-fsycl-is-host"

llvm/include/llvm/SYCLLowerIR/DeviceConfigFile.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -220,9 +220,11 @@ class IntelTargetInfo<string Name, list<Aspect> Aspects, list<int> subGroupSizes
220220
// sizes to be 16 and 32, which corresponds to PVC having 16 and 32
221221
// as sub-group sizes the supported sub-group sizes.
222222

223+
def : IntelTargetInfo<"intel_gpu_wcl", Fp16Fp64Atomic64, Sg16_32>;
223224
def : IntelTargetInfo<"intel_gpu_ptl_u", Fp16Fp64Atomic64, Sg16_32>;
224225
def : IntelTargetInfo<"intel_gpu_ptl_h", Fp16Fp64Atomic64, Sg16_32>;
225226
def : IntelTargetInfo<"intel_gpu_lnl_m", Fp16Fp64Atomic64, Sg16_32>;
227+
def : IntelTargetInfo<"intel_gpu_bmg_g31", Fp16Fp64Atomic64, Sg16_32>;
226228
def : IntelTargetInfo<"intel_gpu_bmg_g21", Fp16Fp64Atomic64, Sg16_32>;
227229
def : IntelTargetInfo<"intel_gpu_arl_h", Fp16Fp64Atomic64, Sg8_16_32>;
228230
def : IntelTargetInfo<"intel_gpu_mtl_h", Fp16Fp64Atomic64, Sg8_16_32>;

sycl/doc/UsersManual.md

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,9 +47,11 @@ and not recommended to use in production environment.
4747
Special target values specific to Intel, NVIDIA and AMD Processor Graphics
4848
support are accepted, providing a streamlined interface for AOT. Only one of
4949
these values at a time is supported.
50+
* intel_gpu_wcl, intel_gpu_30_3_0 - Wildcat Lake Intel graphics architecture
5051
* intel_gpu_ptl_u, intel_gpu_30_1_1 - Panther Lake U Intel graphics architecture
5152
* intel_gpu_ptl_h, intel_gpu_30_0_4 - Panther Lake H Intel graphics architecture
5253
* intel_gpu_lnl_m, intel_gpu_20_4_4 - Lunar Lake Intel graphics architecture
54+
* intel_gpu_bmg_g31, intel_gpu_20_2_0 - Battlemage G31 Intel graphics architecture
5355
* intel_gpu_bmg_g21, intel_gpu_20_1_4 - Battlemage G21 Intel graphics architecture
5456
* intel_gpu_arl_h, intel_gpu_12_74_4 - Arrow Lake H Intel graphics architecture
5557
* intel_gpu_mtl_h, intel_gpu_12_71_4 - Meteor Lake H Intel graphics architecture

sycl/doc/extensions/experimental/sycl_ext_oneapi_device_architecture.asciidoc

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -397,6 +397,14 @@ intel_gpu_bmg_g21
397397
|-
398398
|Battlemage G21 Intel graphics architecture.
399399

400+
a|
401+
[source]
402+
----
403+
intel_gpu_bmg_g31
404+
----
405+
|-
406+
|Battlemage G31 Intel graphics architecture.
407+
400408
a|
401409
[source]
402410
----
@@ -421,6 +429,14 @@ intel_gpu_ptl_u
421429
|-
422430
|Panther Lake U Intel graphics architecture.
423431

432+
a|
433+
[source]
434+
----
435+
intel_gpu_wcl
436+
----
437+
|-
438+
|Wildcat Lake Intel graphics architecture.
439+
424440
a|
425441
[source]
426442
----
@@ -450,9 +466,11 @@ intel_gpu_12_70_4 = intel_gpu_mtl_u
450466
intel_gpu_12_71_4 = intel_gpu_mtl_h
451467
intel_gpu_12_74_4 = intel_gpu_arl_h
452468
intel_gpu_20_1_4 = intel_gpu_bmg_g21
469+
intel_gpu_20_2_0 = intel_gpu_bmg_g31
453470
intel_gpu_20_4_4 = intel_gpu_lnl_m
454471
intel_gpu_30_0_4 = intel_gpu_ptl_h
455472
intel_gpu_30_1_1 = intel_gpu_ptl_u
473+
intel_gpu_30_3_0 = intel_gpu_wcl
456474
----
457475
|-
458476
|Aliases for Intel graphics architectures.

sycl/include/sycl/ext/oneapi/experimental/device_architecture.def

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -73,9 +73,11 @@ __SYCL_ARCHITECTURE_ALIAS(intel_gpu_arl_s, intel_gpu_mtl_u) // Arrow Lake S
7373
__SYCL_ARCHITECTURE(intel_gpu_mtl_h, 0x0000000311c00400) // Meteor Lake H
7474
__SYCL_ARCHITECTURE(intel_gpu_arl_h, 0x0000000312800400) // Arrow Lake H
7575
__SYCL_ARCHITECTURE(intel_gpu_bmg_g21, 0x0000000500400400) // Battlemage G21
76+
__SYCL_ARCHITECTURE(intel_gpu_bmg_g31, 0x0000000500800000) // Battlemage G31
7677
__SYCL_ARCHITECTURE(intel_gpu_lnl_m, 0x0000000501000400) // Lunar Lake
7778
__SYCL_ARCHITECTURE(intel_gpu_ptl_h, 0x0000000780000400) // Panther Lake H
7879
__SYCL_ARCHITECTURE(intel_gpu_ptl_u, 0x0000000780400100) // Panther Lake U
80+
__SYCL_ARCHITECTURE(intel_gpu_wcl, 0x0000000780c00000) // Wildcat Lake
7981
//
8082
// NVIDIA architectures
8183
//
@@ -171,6 +173,8 @@ __SYCL_ARCHITECTURE_ALIAS(intel_gpu_12_70_4, intel_gpu_mtl_u)
171173
__SYCL_ARCHITECTURE_ALIAS(intel_gpu_12_71_4, intel_gpu_mtl_h)
172174
__SYCL_ARCHITECTURE_ALIAS(intel_gpu_12_74_4, intel_gpu_arl_h)
173175
__SYCL_ARCHITECTURE_ALIAS(intel_gpu_20_1_4, intel_gpu_bmg_g21)
176+
__SYCL_ARCHITECTURE_ALIAS(intel_gpu_20_2_0, intel_gpu_bmg_g31)
174177
__SYCL_ARCHITECTURE_ALIAS(intel_gpu_20_4_4, intel_gpu_lnl_m)
175178
__SYCL_ARCHITECTURE_ALIAS(intel_gpu_30_0_4, intel_gpu_ptl_h)
176-
__SYCL_ARCHITECTURE_ALIAS(intel_gpu_30_1_1, intel_gpu_ptl_u)
179+
__SYCL_ARCHITECTURE_ALIAS(intel_gpu_30_1_1, intel_gpu_ptl_u)
180+
__SYCL_ARCHITECTURE_ALIAS(intel_gpu_30_3_0, intel_gpu_wcl)

sycl/include/sycl/ext/oneapi/experimental/device_architecture.hpp

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -72,7 +72,7 @@ static constexpr ext::oneapi::experimental::architecture
7272
ext::oneapi::experimental::architecture::intel_gpu_bdw;
7373
static constexpr ext::oneapi::experimental::architecture
7474
max_intel_gpu_architecture =
75-
ext::oneapi::experimental::architecture::intel_gpu_ptl_u;
75+
ext::oneapi::experimental::architecture::intel_gpu_wcl;
7676

7777
static constexpr ext::oneapi::experimental::architecture
7878
min_nvidia_gpu_architecture =
@@ -169,6 +169,9 @@ static constexpr ext::oneapi::experimental::architecture
169169
#ifndef __SYCL_TARGET_INTEL_GPU_BMG_G21__
170170
#define __SYCL_TARGET_INTEL_GPU_BMG_G21__ 0
171171
#endif
172+
#ifndef __SYCL_TARGET_INTEL_GPU_BMG_G31__
173+
#define __SYCL_TARGET_INTEL_GPU_BMG_G31__ 0
174+
#endif
172175
#ifndef __SYCL_TARGET_INTEL_GPU_LNL_M__
173176
#define __SYCL_TARGET_INTEL_GPU_LNL_M__ 0
174177
#endif
@@ -178,6 +181,9 @@ static constexpr ext::oneapi::experimental::architecture
178181
#ifndef __SYCL_TARGET_INTEL_GPU_PTL_U__
179182
#define __SYCL_TARGET_INTEL_GPU_PTL_U__ 0
180183
#endif
184+
#ifndef __SYCL_TARGET_INTEL_GPU_WCL__
185+
#define __SYCL_TARGET_INTEL_GPU_WCL__ 0
186+
#endif
181187
#ifndef __SYCL_TARGET_NVIDIA_GPU_SM_50__
182188
#define __SYCL_TARGET_NVIDIA_GPU_SM_50__ 0
183189
#endif
@@ -377,9 +383,11 @@ static constexpr bool is_allowable_aot_mode =
377383
(__SYCL_TARGET_INTEL_GPU_MTL_H__ == 1) ||
378384
(__SYCL_TARGET_INTEL_GPU_ARL_H__ == 1) ||
379385
(__SYCL_TARGET_INTEL_GPU_BMG_G21__ == 1) ||
386+
(__SYCL_TARGET_INTEL_GPU_BMG_G31__ == 1) ||
380387
(__SYCL_TARGET_INTEL_GPU_LNL_M__ == 1) ||
381388
(__SYCL_TARGET_INTEL_GPU_PTL_H__ == 1) ||
382389
(__SYCL_TARGET_INTEL_GPU_PTL_U__ == 1) ||
390+
(__SYCL_TARGET_INTEL_GPU_WCL__ == 1) ||
383391
(__SYCL_TARGET_NVIDIA_GPU_SM_50__ == 1) ||
384392
(__SYCL_TARGET_NVIDIA_GPU_SM_52__ == 1) ||
385393
(__SYCL_TARGET_NVIDIA_GPU_SM_53__ == 1) ||
@@ -524,6 +532,9 @@ get_current_architecture_aot() {
524532
#if __SYCL_TARGET_INTEL_GPU_BMG_G21__
525533
return ext::oneapi::experimental::architecture::intel_gpu_bmg_g21;
526534
#endif
535+
#if __SYCL_TARGET_INTEL_GPU_BMG_G31__
536+
return ext::oneapi::experimental::architecture::intel_gpu_bmg_g31;
537+
#endif
527538
#if __SYCL_TARGET_INTEL_GPU_LNL_M__
528539
return ext::oneapi::experimental::architecture::intel_gpu_lnl_m;
529540
#endif
@@ -533,6 +544,9 @@ get_current_architecture_aot() {
533544
#if __SYCL_TARGET_INTEL_GPU_PTL_U__
534545
return ext::oneapi::experimental::architecture::intel_gpu_ptl_u;
535546
#endif
547+
#if __SYCL_TARGET_INTEL_GPU_WCL__
548+
return ext::oneapi::experimental::architecture::intel_gpu_wcl;
549+
#endif
536550
#if __SYCL_TARGET_NVIDIA_GPU_SM_50__
537551
return ext::oneapi::experimental::architecture::nvidia_gpu_sm_50;
538552
#endif

sycl/source/detail/device_info.hpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -714,13 +714,15 @@ constexpr std::pair<const int, oneapi_exp_arch> IntelGPUArchitectures[] = {
714714
{0x05004000, oneapi_exp_arch::intel_gpu_bmg_g21}, // A0
715715
{0x05004001, oneapi_exp_arch::intel_gpu_bmg_g21}, // A1
716716
{0x05004004, oneapi_exp_arch::intel_gpu_bmg_g21}, // B0
717+
{0x05008000, oneapi_exp_arch::intel_gpu_bmg_g31}, // A0
717718
{0x05010000, oneapi_exp_arch::intel_gpu_lnl_m}, // A0
718719
{0x05010001, oneapi_exp_arch::intel_gpu_lnl_m}, // A1
719720
{0x05010004, oneapi_exp_arch::intel_gpu_lnl_m}, // B0
720721
{0x07800000, oneapi_exp_arch::intel_gpu_ptl_h}, // A0
721722
{0x07800004, oneapi_exp_arch::intel_gpu_ptl_h}, // B0
722723
{0x07804000, oneapi_exp_arch::intel_gpu_ptl_u}, // A0
723724
{0x07804001, oneapi_exp_arch::intel_gpu_ptl_u}, // A1
725+
{0x0780c000, oneapi_exp_arch::intel_gpu_wcl}, // A0
724726
};
725727

726728
// Only for Intel CPU architectures

0 commit comments

Comments
 (0)