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Artem Gindinsonbader
Artem Gindinson
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Sync with SPIR-V Translator de0957d85bcaa
The sync brings the following commits: [de0957d85bcaa] Disabling mem2reg by default [e963d8deacece] Translate __fpga_reg builtin to FPGARegINTEL instruction Signed-off-by: Artem Gindinson <[email protected]>
1 parent 288afa4 commit d89b79d

18 files changed

+603
-111
lines changed

‎llvm-spirv/lib/SPIRV/OCLUtil.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -165,6 +165,7 @@ const static char Dot[] = "dot";
165165
const static char EnqueueKernel[] = "enqueue_kernel";
166166
const static char FMax[] = "fmax";
167167
const static char FMin[] = "fmin";
168+
const static char FPGARegIntel[] = "__builtin_intel_fpga_reg";
168169
const static char GetFence[] = "get_fence";
169170
const static char GetImageArraySize[] = "get_image_array_size";
170171
const static char GetImageChannelOrder[] = "get_image_channel_order";

‎llvm-spirv/lib/SPIRV/SPIRVReader.cpp

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1756,6 +1756,52 @@ Value *SPIRVToLLVM::transValueWithoutDecoration(SPIRVValue *BV, Function *F,
17561756
case OpGetKernelNDrangeSubGroupCount:
17571757
return mapValue(
17581758
BV, transSGSizeQueryBI(static_cast<SPIRVInstruction *>(BV), BB));
1759+
case OpFPGARegINTEL: {
1760+
IRBuilder<> Builder(BB);
1761+
1762+
SPIRVFPGARegINTELInstBase *BC =
1763+
static_cast<SPIRVFPGARegINTELInstBase *>(BV);
1764+
1765+
PointerType *Int8PtrTyPrivate =
1766+
Type::getInt8PtrTy(*Context, SPIRAS_Private);
1767+
IntegerType *Int32Ty = Type::getInt32Ty(*Context);
1768+
1769+
Value *UndefInt8Ptr = UndefValue::get(Int8PtrTyPrivate);
1770+
Value *UndefInt32 = UndefValue::get(Int32Ty);
1771+
1772+
Constant *GS = Builder.CreateGlobalStringPtr(kOCLBuiltinName::FPGARegIntel);
1773+
1774+
Type *Ty = transType(BC->getType());
1775+
Value *Val = transValue(BC->getOperand(0), F, BB);
1776+
1777+
Value *ValAsArg = Val;
1778+
Type *RetTy = Ty;
1779+
auto IID = Intrinsic::annotation;
1780+
if (!isa<IntegerType>(Ty)) {
1781+
// All scalar types can be bitcasted to a same-sized integer
1782+
if (!isa<PointerType>(Ty) && !isa<StructType>(Ty)) {
1783+
RetTy = IntegerType::get(*Context, Ty->getPrimitiveSizeInBits());
1784+
ValAsArg = Builder.CreateBitCast(Val, RetTy);
1785+
}
1786+
// If pointer type or struct type
1787+
else {
1788+
IID = Intrinsic::ptr_annotation;
1789+
auto *PtrTy = dyn_cast<PointerType>(Ty);
1790+
if (PtrTy && isa<IntegerType>(PtrTy->getElementType()))
1791+
RetTy = PtrTy;
1792+
// Whether a struct or a pointer to some other type,
1793+
// bitcast to i8*
1794+
else {
1795+
RetTy = Int8PtrTyPrivate;
1796+
ValAsArg = Builder.CreateBitCast(Val, Int8PtrTyPrivate);
1797+
}
1798+
}
1799+
}
1800+
1801+
Value *Args[] = {ValAsArg, GS, UndefInt8Ptr, UndefInt32};
1802+
auto *IntrinsicCall = Builder.CreateIntrinsic(IID, RetTy, Args);
1803+
return mapValue(BV, IntrinsicCall);
1804+
}
17591805
default: {
17601806
auto OC = BV->getOpCode();
17611807
if (isSPIRVCmpInstTransToLLVMInst(static_cast<SPIRVInstruction *>(BV))) {

‎llvm-spirv/lib/SPIRV/SPIRVWriter.cpp

Lines changed: 39 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -87,7 +87,7 @@ using namespace OCLUtil;
8787

8888
namespace SPIRV {
8989

90-
cl::opt<bool> SPIRVMemToReg("spirv-mem2reg", cl::init(true),
90+
cl::opt<bool> SPIRVMemToReg("spirv-mem2reg", cl::init(false),
9191
cl::desc("LLVM/SPIR-V translation enable mem2reg"));
9292

9393
cl::opt<bool> SPIRVNoDerefAttr(
@@ -258,7 +258,7 @@ SPIRVType *LLVMToSPIRV::transType(Type *T) {
258258
return mapType(T, BM->addFloatType(T->getPrimitiveSizeInBits()));
259259

260260
// A pointer to image or pipe type in LLVM is translated to a SPIRV
261-
// sampler or pipe type.
261+
// (non-pointer) image or pipe type.
262262
if (T->isPointerTy()) {
263263
auto ET = T->getPointerElementType();
264264
assert(!ET->isFunctionTy() && "Function pointer type is not allowed");
@@ -1322,6 +1322,22 @@ SPIRVValue *LLVMToSPIRV::transIntrinsicInst(IntrinsicInst *II,
13221322
return DbgTran->createDebugDeclarePlaceholder(cast<DbgDeclareInst>(II), BB);
13231323
case Intrinsic::dbg_value:
13241324
return DbgTran->createDebugValuePlaceholder(cast<DbgValueInst>(II), BB);
1325+
case Intrinsic::annotation: {
1326+
SPIRVType *Ty = transType(II->getType());
1327+
1328+
GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(II->getArgOperand(1));
1329+
if (!GEP)
1330+
return nullptr;
1331+
Constant *C = cast<Constant>(GEP->getOperand(0));
1332+
// TODO: Refactor to use getConstantStringInfo()
1333+
StringRef AnnotationString =
1334+
cast<ConstantDataArray>(C->getOperand(0))->getAsCString();
1335+
1336+
if (AnnotationString == kOCLBuiltinName::FPGARegIntel)
1337+
return BM->addFPGARegINTELInst(Ty, transValue(II->getOperand(0), BB), BB);
1338+
1339+
return nullptr;
1340+
}
13251341
case Intrinsic::var_annotation: {
13261342
SPIRVValue *SV;
13271343
if (auto *BI = dyn_cast<BitCastInst>(II->getArgOperand(0))) {
@@ -1332,6 +1348,7 @@ SPIRVValue *LLVMToSPIRV::transIntrinsicInst(IntrinsicInst *II,
13321348

13331349
GetElementPtrInst *GEP = cast<GetElementPtrInst>(II->getArgOperand(1));
13341350
Constant *C = cast<Constant>(GEP->getOperand(0));
1351+
// TODO: Refactor to use getConstantStringInfo()
13351352
StringRef AnnotationString =
13361353
cast<ConstantDataArray>(C->getOperand(0))->getAsString();
13371354

@@ -1352,28 +1369,34 @@ SPIRVValue *LLVMToSPIRV::transIntrinsicInst(IntrinsicInst *II,
13521369
} else {
13531370
GI = dyn_cast<GetElementPtrInst>(II->getOperand(0));
13541371
}
1355-
SPIRVType *Ty = transType(GI->getSourceElementType());
1356-
1357-
SPIRVWord MemberNumber =
1358-
dyn_cast<ConstantInt>(GI->getOperand(2))->getZExtValue();
13591372

13601373
GetElementPtrInst *GEP = dyn_cast<GetElementPtrInst>(II->getArgOperand(1));
13611374
Constant *C = dyn_cast<Constant>(GEP->getOperand(0));
1375+
// TODO: Refactor to use getConstantStringInfo()
13621376
StringRef AnnotationString =
1363-
dyn_cast<ConstantDataArray>(C->getOperand(0))->getAsString();
1377+
dyn_cast<ConstantDataArray>(C->getOperand(0))->getAsCString();
13641378

1365-
std::vector<std::pair<Decoration, std::string>> Decorations =
1366-
parseAnnotations(AnnotationString);
1379+
if (GI) {
1380+
auto *Ty = transType(GI->getSourceElementType());
1381+
SPIRVWord MemberNumber =
1382+
dyn_cast<ConstantInt>(GI->getOperand(2))->getZExtValue();
13671383

1368-
if (Decorations.empty()) {
1369-
Ty->addMemberDecorate(new SPIRVMemberDecorateUserSemanticAttr(
1370-
Ty, MemberNumber,
1371-
AnnotationString.substr(0, AnnotationString.size() - 1)));
1384+
std::vector<std::pair<Decoration, std::string>> Decorations =
1385+
parseAnnotations(AnnotationString);
1386+
1387+
if (Decorations.empty()) {
1388+
Ty->addMemberDecorate(new SPIRVMemberDecorateUserSemanticAttr(
1389+
Ty, MemberNumber, AnnotationString));
1390+
} else {
1391+
addIntelFPGADecorationsForStructMember(Ty, MemberNumber, Decorations);
1392+
}
1393+
II->replaceAllUsesWith(II->getOperand(0));
13721394
} else {
1373-
addIntelFPGADecorationsForStructMember(Ty, MemberNumber, Decorations);
1395+
auto *Ty = transType(II->getType());
1396+
auto *BI = dyn_cast<BitCastInst>(II->getOperand(0));
1397+
if (AnnotationString == kOCLBuiltinName::FPGARegIntel)
1398+
return BM->addFPGARegINTELInst(Ty, transValue(BI, BB), BB);
13741399
}
1375-
1376-
II->replaceAllUsesWith(II->getOperand(0));
13771400
return 0;
13781401
}
13791402
default:

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVEnum.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -117,7 +117,8 @@ enum SPIRVExtensionKind {
117117
SPV_INTEL_blocking_pipes,
118118
SPV_INTEL_device_side_avc_motion_estimation,
119119
SPV_KHR_no_integer_wrap_decoration,
120-
SPV_INTEL_fpga_memory_attributes
120+
SPV_INTEL_fpga_memory_attributes,
121+
SPV_INTEL_fpga_reg
121122
};
122123

123124
typedef std::set<SPIRVExtensionKind> SPIRVExtSet;
@@ -128,6 +129,7 @@ template <> inline void SPIRVMap<SPIRVExtensionKind, std::string>::init() {
128129
"SPV_INTEL_device_side_avc_motion_estimation");
129130
add(SPV_KHR_no_integer_wrap_decoration, "SPV_KHR_no_integer_wrap_decoration");
130131
add(SPV_INTEL_fpga_memory_attributes, "SPV_INTEL_fpga_memory_attributes");
132+
add(SPV_INTEL_fpga_reg, "SPV_INTEL_fpga_reg");
131133
}
132134

133135
template <> inline void SPIRVMap<SPIRVExtInstSetKind, std::string>::init() {

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVInstruction.h

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -873,6 +873,29 @@ class SPIRVPhi : public SPIRVInstruction {
873873
std::vector<SPIRVId> Pairs;
874874
};
875875

876+
class SPIRVFPGARegINTELInstBase : public SPIRVInstTemplateBase {
877+
public:
878+
SPIRVCapVec getRequiredCapability() const override {
879+
return getVec(CapabilityFPGARegINTEL);
880+
}
881+
882+
SPIRVExtSet getRequiredExtensions() const override {
883+
return getSet(SPV_INTEL_fpga_reg);
884+
}
885+
886+
protected:
887+
void validate() const override {
888+
SPIRVInstruction::validate();
889+
890+
assert(OpCode == OpFPGARegINTEL &&
891+
"Invalid op code for FPGARegINTEL instruction");
892+
assert(getType() == getValueType(Ops[0]) && "Inconsistent type");
893+
}
894+
};
895+
896+
typedef SPIRVInstTemplate<SPIRVFPGARegINTELInstBase, OpFPGARegINTEL, true, 4>
897+
SPIRVFPGARegINTEL;
898+
876899
class SPIRVCompare : public SPIRVInstTemplateBase {
877900
protected:
878901
void validate() const override {

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVIsValidEnum.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1002,6 +1002,7 @@ inline bool isValid(spv::Op V) {
10021002
case OpSubgroupAvcSicGetPackedSkcLumaCountThresholdINTEL:
10031003
case OpSubgroupAvcSicGetPackedSkcLumaSumThresholdINTEL:
10041004
case OpSubgroupAvcSicGetInterRawSadsINTEL:
1005+
case OpFPGARegINTEL:
10051006
return true;
10061007
default:
10071008
return false;

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.cpp

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -363,6 +363,8 @@ class SPIRVModuleImpl : public SPIRVModule {
363363
SPIRVInstruction *addVectorInsertDynamicInst(SPIRVValue *, SPIRVValue *,
364364
SPIRVValue *,
365365
SPIRVBasicBlock *) override;
366+
SPIRVInstruction *addFPGARegINTELInst(SPIRVType *, SPIRVValue *,
367+
SPIRVBasicBlock *) override;
366368

367369
virtual SPIRVId getExtInstSetId(SPIRVExtInstSetKind Kind) const override;
368370

@@ -1290,6 +1292,15 @@ SPIRVInstruction *SPIRVModuleImpl::addCopyMemorySizedInst(
12901292
BB);
12911293
}
12921294

1295+
SPIRVInstruction *SPIRVModuleImpl::addFPGARegINTELInst(SPIRVType *Type,
1296+
SPIRVValue *V,
1297+
SPIRVBasicBlock *BB) {
1298+
return addInstruction(
1299+
SPIRVInstTemplateBase::create(OpFPGARegINTEL, Type, getId(),
1300+
getVec(V->getId()), BB, this),
1301+
BB);
1302+
}
1303+
12931304
SPIRVInstruction *SPIRVModuleImpl::addVariable(
12941305
SPIRVType *Type, bool IsConstant, SPIRVLinkageTypeKind LinkageType,
12951306
SPIRVValue *Initializer, const std::string &Name,

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVModule.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -375,6 +375,8 @@ class SPIRVModule {
375375
SPIRVValue *,
376376
SPIRVValue *,
377377
SPIRVBasicBlock *) = 0;
378+
virtual SPIRVInstruction *addFPGARegINTELInst(SPIRVType *, SPIRVValue *,
379+
SPIRVBasicBlock *) = 0;
378380
virtual SPIRVId getExtInstSetId(SPIRVExtInstSetKind Kind) const = 0;
379381

380382
// I/O functions

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVNameMapEnum.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -490,6 +490,7 @@ template <> inline void SPIRVMap<Capability, std::string>::init() {
490490
add(CapabilityFPGAMemoryAttributesINTEL, "FPGAMemoryAttributesINTEL");
491491
add(CapabilityFPGALoopControlsINTEL, "FPGALoopControlsINTEL");
492492
add(CapabilityBlockingPipesINTEL, "BlockingPipesINTEL");
493+
add(CapabilityFPGARegINTEL, "FPGARegINTEL");
493494
}
494495
SPIRV_DEF_NAMEMAP(Capability, SPIRVCapabilityNameMap)
495496

‎llvm-spirv/lib/SPIRV/libSPIRV/SPIRVOpCodeEnum.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -431,3 +431,4 @@ _SPIRV_OP(SubgroupAvcSicGetPackedSkcLumaSumThresholdINTEL, 5815)
431431
_SPIRV_OP(SubgroupAvcSicGetInterRawSadsINTEL, 5816)
432432
_SPIRV_OP(ReadPipeBlockingINTEL, 5946)
433433
_SPIRV_OP(WritePipeBlockingINTEL, 5947)
434+
_SPIRV_OP(FPGARegINTEL, 5949)

‎llvm-spirv/lib/SPIRV/libSPIRV/spirv.hpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -681,6 +681,7 @@ enum Capability {
681681
CapabilityFPGAMemoryAttributesINTEL = 5824,
682682
CapabilityFPGALoopControlsINTEL = 5888,
683683
CapabilityBlockingPipesINTEL = 5945,
684+
CapabilityFPGARegINTEL = 5948,
684685
CapabilityMax = 0x7fffffff,
685686
};
686687

@@ -1127,6 +1128,7 @@ enum Op {
11271128
OpSubgroupAvcSicGetInterRawSadsINTEL = 5816,
11281129
OpReadPipeBlockingINTEL = 5946,
11291130
OpWritePipeBlockingINTEL = 5947,
1131+
OpFPGARegINTEL = 5949,
11301132
OpMax = 0x7fffffff,
11311133
};
11321134

‎llvm-spirv/test/AtomicCompareExchange_cl20.ll

Lines changed: 17 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -11,9 +11,6 @@ target triple = "spir-unknown-unknown"
1111
; Int64Atomics capability must be declared only if atomic builtins have 64-bit integers arguments.
1212
; CHECK-NOT: Capability Int64Atomics
1313

14-
; CHECK: Name [[Pointer:[0-9]+]] "object"
15-
; CHECK: Name [[ComparatorPtr:[0-9]+]] "expected"
16-
; CHECK: Name [[Value:[0-9]+]] "desired"
1714
; CHECK: 4 TypeInt [[int:[0-9]+]] 32 0
1815
; CHECK: Constant [[int]] [[DeviceScope:[0-9]+]] 1
1916
; CHECK: Constant [[int]] [[SequentiallyConsistent_MS:[0-9]+]] 16
@@ -22,9 +19,9 @@ target triple = "spir-unknown-unknown"
2219

2320
; Function Attrs: nounwind
2421
define spir_func void @test(i32 addrspace(4)* %object, i32 addrspace(4)* %expected, i32 %desired) #0 {
25-
; CHECK: FunctionParameter [[int_ptr]] [[Pointer]]
26-
; CHECK: FunctionParameter [[int_ptr]] [[ComparatorPtr]]
27-
; CHECK: FunctionParameter [[int]] [[Value]]
22+
; CHECK: FunctionParameter [[int_ptr]] [[object:[0-9]+]]
23+
; CHECK: FunctionParameter [[int_ptr]] [[expected:[0-9]+]]
24+
; CHECK: FunctionParameter [[int]] [[desired:[0-9]+]]
2825

2926
entry:
3027
%object.addr = alloca i32 addrspace(4)*, align 4
@@ -39,11 +36,16 @@ entry:
3936
%0 = load i32 addrspace(4)*, i32 addrspace(4)** %object.addr, align 4
4037
%1 = load i32 addrspace(4)*, i32 addrspace(4)** %expected.addr, align 4
4138
%2 = load i32, i32* %desired.addr, align 4
42-
43-
%call = call spir_func zeroext i1 @_Z30atomic_compare_exchange_strongPVU3AS4U7_AtomiciPU3AS4ii(i32 addrspace(4)* %0, i32 addrspace(4)* %1, i32 %2)
44-
; CHECK: Load [[int]] [[Comparator:[0-9]+]] [[ComparatorPtr]]
39+
; CHECK: Store [[object_addr:[0-9]+]] [[object]]
40+
; CHECK: Store [[expected_addr:[0-9]+]] [[expected]]
41+
; CHECK: Store [[desired_addr:[0-9]+]] [[desired]]
42+
; CHECK: Load [[int_ptr]] [[Pointer:[0-9]+]] [[object_addr]]
43+
; CHECK: Load [[int_ptr]] [[exp:[0-9]+]] [[expected_addr]]
44+
; CHECK: Load [[int]] [[Value:[0-9]+]] [[desired_addr]]
45+
; CHECK: Load [[int]] [[Comparator:[0-9]+]] [[exp]]
4546
; CHECK-NEXT: 9 AtomicCompareExchange [[int]] [[Result:[0-9]+]] [[Pointer]] [[DeviceScope]] [[SequentiallyConsistent_MS]] [[SequentiallyConsistent_MS]] [[Value]] [[Comparator]]
46-
; CHECK-NEXT: Store [[ComparatorPtr]] [[Result]]
47+
%call = call spir_func zeroext i1 @_Z30atomic_compare_exchange_strongPVU3AS4U7_AtomiciPU3AS4ii(i32 addrspace(4)* %0, i32 addrspace(4)* %1, i32 %2)
48+
; CHECK-NEXT: Store [[exp]] [[Result]]
4749
; CHECK-NEXT: IEqual [[bool]] [[CallRes:[0-9]+]] [[Result]] [[Comparator]]
4850
; CHECK-NOT: [[Result]]
4951
%frombool = zext i1 %call to i8
@@ -57,10 +59,13 @@ entry:
5759
%5 = load i32 addrspace(4)*, i32 addrspace(4)** %expected.addr, align 4
5860
%6 = load i32, i32* %desired.addr, align 4
5961

62+
; CHECK: Load [[int_ptr]] [[Pointer:[0-9]+]] [[object_addr]]
63+
; CHECK: Load [[int_ptr]] [[exp:[0-9]+]] [[expected_addr]]
64+
; CHECK: Load [[int]] [[Value:[0-9]+]] [[desired_addr]]
65+
; CHECK: Load [[int]] [[ComparatorWeak:[0-9]+]] [[exp]]
6066
%call2 = call spir_func zeroext i1 @_Z28atomic_compare_exchange_weakPVU3AS4U7_AtomiciPU3AS4ii(i32 addrspace(4)* %4, i32 addrspace(4)* %5, i32 %6)
61-
; CHECK: Load [[int]] [[ComparatorWeak:[0-9]+]] [[ComparatorPtr]]
6267
; CHECK-NEXT: 9 AtomicCompareExchangeWeak [[int]] [[Result:[0-9]+]] [[Pointer]] [[DeviceScope]] [[SequentiallyConsistent_MS]] [[SequentiallyConsistent_MS]] [[Value]] [[ComparatorWeak]]
63-
; CHECK-NEXT: Store [[ComparatorPtr]] [[Result]]
68+
; CHECK-NEXT: Store [[exp]] [[Result]]
6469
; CHECK-NEXT: IEqual [[bool]] [[CallRes:[0-9]+]] [[Result]] [[ComparatorWeak]]
6570
; CHECK-NOT: [[Result]]
6671

‎llvm-spirv/test/DebugInfo/BuiltinCallLocation.cl

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
// CHECK-SPIRV: Label
99
// CHECK-SPIRV: ExtInst {{.*}} DebugScope
1010
// CHECK-SPIRV: ExtInst {{.*}} sin
11-
// CHECK-LLVM: call spir_func float @_Z3sinf(float %x) {{.*}} !dbg ![[loc:[0-9]+]]
11+
// CHECK-LLVM: call spir_func float @_Z3sinf(float %{{.*}}) {{.*}} !dbg ![[loc:[0-9]+]]
1212
// CHECK-LLVM: ![[loc]] = !DILocation(line: 14, column: 10, scope: !{{.*}})
1313
float f(float x) {
1414
return sin(x);

‎llvm-spirv/test/DebugInfo/DebugDeclareUnused.cl

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
11
// Check that we can translate llvm.dbg.declare for a local variable which was
2-
// deleted by mem2reg pass(enabled by default in llvm-spirv)
2+
// deleted by mem2reg pass(disabled by default in llvm-spirv)
33

4-
// RUN: %clang_cc1 %s -triple spir -disable-llvm-passes -debug-info-kind=standalone -emit-llvm-bc -o - | llvm-spirv -o %t.spv
4+
// RUN: %clang_cc1 %s -triple spir -disable-llvm-passes -debug-info-kind=standalone -emit-llvm-bc -o - | llvm-spirv -spirv-mem2reg -o %t.spv
55
// RUN: llvm-spirv %t.spv -to-text -o - | FileCheck %s --check-prefix=CHECK-SPIRV
66
// RUN: llvm-spirv -r %t.spv -o - | llvm-dis -o - | FileCheck %s --check-prefix=CHECK-LLVM
77

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