Skip to content

Commit f7eecf8

Browse files
committed
[Sparc] Emit 'restore' instead of 'restore %g0, %g0, %g0'. This improves the readability of the generated code.
llvm-svn: 202563
1 parent fed5597 commit f7eecf8

File tree

6 files changed

+23
-3
lines changed

6 files changed

+23
-3
lines changed

llvm/lib/Target/Sparc/InstPrinter/SparcInstPrinter.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,14 @@
2020
#include "llvm/Support/raw_ostream.h"
2121
using namespace llvm;
2222

23+
// The generated AsmMatcher SparcGenAsmWriter uses "Sparc" as the target
24+
// namespace. But SPARC backend uses "SP" as its namespace.
25+
namespace llvm {
26+
namespace Sparc {
27+
using namespace SP;
28+
}
29+
}
30+
2331
#define GET_INSTRUCTION_NAME
2432
#define PRINT_ALIAS_INSTR
2533
#include "SparcGenAsmWriter.inc"

llvm/lib/Target/Sparc/SparcInstrAliases.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -140,3 +140,6 @@ def : InstAlias<"mov $rs2, $rd", (ORrr IntRegs:$rd, G0, IntRegs:$rs2)>;
140140

141141
// mov simm13, rd -> or %g0, simm13, rd
142142
def : InstAlias<"mov $simm13, $rd", (ORri IntRegs:$rd, G0, i32imm:$simm13)>;
143+
144+
// restore -> restore %g0, %g0, %g0
145+
def : InstAlias<"restore", (RESTORErr G0, G0, G0)>;

llvm/test/CodeGen/SPARC/2011-01-11-FrameAddr.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,7 +21,8 @@ entry:
2121
;SPARC64: save %sp, -128, %sp
2222
;SPARC64: add %fp, 2047, %i0
2323
;SPARC64: ret
24-
;SPARC64: restore %g0, %g0, %g0
24+
;SPARC64-NOT: restore %g0, %g0, %g0
25+
;SPARC64: restore
2526

2627
%0 = tail call i8* @llvm.frameaddress(i32 0)
2728
ret i8* %0

llvm/test/CodeGen/SPARC/2011-01-19-DelaySlot.ll

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -141,7 +141,8 @@ entry:
141141
;CHECK-LABEL: restore_or_imm:
142142
;CHECK: or %o0, 20, %i0
143143
;CHECK: ret
144-
;CHECK: restore %g0, %g0, %g0
144+
;CHECK-NOT: restore %g0, %g0, %g0
145+
;CHECK: restore
145146
%0 = tail call i32 @bar(i32 %a) nounwind
146147
%1 = or i32 %0, 20
147148
ret i32 %1
@@ -174,7 +175,8 @@ define i32 @restore_sethi_large(i32 %a) {
174175
entry:
175176
;CHECK-LABEL: restore_sethi_large:
176177
;CHECK: sethi 4000, %i0
177-
;CHECK: restore %g0, %g0, %g0
178+
;CHECK-NOT: restore %g0, %g0, %g0
179+
;CHECK: restore
178180
%0 = tail call i32 @bar(i32 %a) nounwind
179181
%1 = icmp ne i32 %0, 0
180182
%2 = select i1 %1, i32 4096000, i32 0

llvm/test/MC/Disassembler/Sparc/sparc.txt

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -167,3 +167,6 @@
167167

168168
# CHECK: fbo 4194303
169169
0x1f 0xbf 0xff 0xff
170+
171+
# CHECK: restore
172+
0x81 0xe8 0x00 0x00

llvm/test/MC/Sparc/sparc-alu-instructions.s

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -75,3 +75,6 @@
7575

7676
! CHECK: or %g0, 255, %g3 ! encoding: [0x86,0x10,0x20,0xff]
7777
mov 0xff, %g3
78+
79+
! CHECK: restore ! encoding: [0x81,0xe8,0x00,0x00]
80+
restore %g0, %g0, %g0

0 commit comments

Comments
 (0)