[SYCL][HIP] Rename the ROCm plugin to HIP (#4418)

HIP is a better name in this case as it is the API the plugin is
actually built on rather than ROCm which is more of a framework.

As discussed this patch renames the ROCm plugin to HIP, it is thus very large but doesn't have any functional changes.

I tested it on both AMD and NVIDIA with `check-sycl-hip` and `check-sycl-hip-on-device`, and the results were the same than before this patch with `check-sycl-rocm` and `check-sycl-rocm-on-device`.

Author: npmiller

buildbot/configure.py

@@ -30,8 +30,8 @@ def do_configure(args):
     libclc_gen_remangled_variants = 'OFF'
     sycl_build_pi_cuda = 'OFF'
     sycl_build_pi_esimd_cpu = 'OFF'
-    sycl_build_pi_rocm = 'OFF'
-    sycl_build_pi_rocm_platform = 'AMD'
+    sycl_build_pi_hip = 'OFF'
+    sycl_build_pi_hip_platform = 'AMD'
     sycl_werror = 'ON'
     llvm_enable_assertions = 'ON'
     llvm_enable_doxygen = 'OFF'
@@ -48,7 +48,7 @@ def do_configure(args):
     if args.enable_esimd_cpu_emulation:
         sycl_build_pi_esimd_cpu = 'ON'
 
-    if args.cuda or args.rocm:
+    if args.cuda or args.hip:
         llvm_enable_projects += ';libclc'
 
     if args.cuda:
@@ -57,20 +57,20 @@ def do_configure(args):
         libclc_gen_remangled_variants = 'ON'
         sycl_build_pi_cuda = 'ON'
 
-    if args.rocm:
-        if args.rocm_platform == 'AMD':
+    if args.hip:
+        if args.hip_platform == 'AMD':
             llvm_targets_to_build += ';AMDGPU'
             libclc_targets_to_build += ';amdgcn--;amdgcn--amdhsa'
 
-            # The ROCm plugin for AMD uses lld for linking
+            # The HIP plugin for AMD uses lld for linking
             llvm_enable_projects += ';lld'
-        elif args.rocm_platform == 'NVIDIA' and not args.cuda:
+        elif args.hip_platform == 'NVIDIA' and not args.cuda:
             llvm_targets_to_build += ';NVPTX'
             libclc_targets_to_build += ';nvptx64--;nvptx64--nvidiacl'
         libclc_gen_remangled_variants = 'ON'
 
-        sycl_build_pi_rocm_platform = args.rocm_platform
-        sycl_build_pi_rocm = 'ON'
+        sycl_build_pi_hip_platform = args.hip_platform
+        sycl_build_pi_hip = 'ON'
 
     if args.no_werror:
         sycl_werror = 'OFF'
@@ -107,8 +107,8 @@ def do_configure(args):
         "-DLIBCLC_TARGETS_TO_BUILD={}".format(libclc_targets_to_build),
         "-DLIBCLC_GENERATE_REMANGLED_VARIANTS={}".format(libclc_gen_remangled_variants),
         "-DSYCL_BUILD_PI_CUDA={}".format(sycl_build_pi_cuda),
-        "-DSYCL_BUILD_PI_ROCM={}".format(sycl_build_pi_rocm),
-        "-DSYCL_BUILD_PI_ROCM_PLATFORM={}".format(sycl_build_pi_rocm_platform),
+        "-DSYCL_BUILD_PI_HIP={}".format(sycl_build_pi_hip),
+        "-DSYCL_BUILD_PI_HIP_PLATFORM={}".format(sycl_build_pi_hip_platform),
         "-DLLVM_BUILD_TOOLS=ON",
         "-DSYCL_ENABLE_WERROR={}".format(sycl_werror),
         "-DCMAKE_INSTALL_PREFIX={}".format(install_dir),
@@ -178,8 +178,8 @@ def main():
     parser.add_argument("-t", "--build-type",
                         metavar="BUILD_TYPE", default="Release", help="build type: Debug, Release")
     parser.add_argument("--cuda", action='store_true', help="switch from OpenCL to CUDA")
-    parser.add_argument("--rocm", action='store_true', help="switch from OpenCL to ROCm")
-    parser.add_argument("--rocm-platform", type=str, choices=['AMD', 'NVIDIA'], default='AMD', help="choose ROCm backend")
+    parser.add_argument("--hip", action='store_true', help="switch from OpenCL to HIP")
+    parser.add_argument("--hip-platform", type=str, choices=['AMD', 'NVIDIA'], default='AMD', help="choose hardware platform for HIP backend")
     parser.add_argument("--arm", action='store_true', help="build ARM support rather than x86")
     parser.add_argument("--enable-esimd-cpu-emulation", action='store_true', help="build with ESIMD_CPU emulation support")
     parser.add_argument("--no-assertions", action='store_true', help="build without assertions")

sycl/CMakeLists.txt

@@ -90,8 +90,8 @@ install(DIRECTORY ${OpenCL_INCLUDE_DIR}/CL
 option(SYCL_BUILD_PI_CUDA
   "Enables the CUDA backend for the Plugin Interface" OFF)
 
-option(SYCL_BUILD_PI_ROCM
-  "Enables the ROCM backend for the Plugin Interface" OFF)
+option(SYCL_BUILD_PI_HIP
+  "Enables the HIP backend for the Plugin Interface" OFF)
 
 # Configure SYCL version macro
 set(sycl_inc_dir ${CMAKE_CURRENT_SOURCE_DIR}/include)
@@ -279,16 +279,16 @@ if(SYCL_BUILD_PI_CUDA)
   list(APPEND SYCL_TOOLCHAIN_DEPLOY_COMPONENTS libspirv-builtins pi_cuda)
 endif()
 
-if(SYCL_BUILD_PI_ROCM)
+if(SYCL_BUILD_PI_HIP)
   # Ensure that libclc is enabled.
   list(FIND LLVM_ENABLE_PROJECTS libclc LIBCLC_FOUND)
   if( LIBCLC_FOUND EQUAL -1 )
     message(FATAL_ERROR
-      "ROCM support requires adding \"libclc\" to the CMake argument \"LLVM_ENABLE_PROJECTS\"")
+      "HIP support requires adding \"libclc\" to the CMake argument \"LLVM_ENABLE_PROJECTS\"")
   endif()
 
-  add_dependencies(sycl-toolchain libspirv-builtins pi_rocm)
-  list(APPEND SYCL_TOOLCHAIN_DEPLOY_COMPONENTS libspirv-builtins pi_rocm)
+  add_dependencies(sycl-toolchain libspirv-builtins pi_hip)
+  list(APPEND SYCL_TOOLCHAIN_DEPLOY_COMPONENTS libspirv-builtins pi_hip)
 endif()
 
 # TODO : Remove 'if (NOT MSVC)' when CM_EMU supports Windows

sycl/doc/GetStartedGuide.md

@@ -9,8 +9,8 @@ and a wide range of compute accelerators such as GPU and FPGA.
   - [Build DPC++ toolchain](#build-dpc-toolchain)
     - [Build DPC++ toolchain with libc++ library](#build-dpc-toolchain-with-libc-library)
     - [Build DPC++ toolchain with support for NVIDIA CUDA](#build-dpc-toolchain-with-support-for-nvidia-cuda)
-    - [Build DPC++ toolchain with support for AMD ROCm](#build-dpc-toolchain-with-support-for-amd-rocm)
-    - [Build DPC++ toolchain with support for NVIDIA ROCm](#build-dpc-toolchain-with-support-for-nvidia-rocm)
+    - [Build DPC++ toolchain with support for HIP AMD](#build-dpc-toolchain-with-support-for-hip-amd)
+    - [Build DPC++ toolchain with support for HIP NVIDIA](#build-dpc-toolchain-with-support-for-hip-nvidia)
     - [Build DPC++ toolchain with support for ESIMD CPU Emulation](#build-dpc-toolchain-with-support-for-esimd-cpu)
     - [Build Doxygen documentation](#build-doxygen-documentation)
     - [Deployment](#deployment)
@@ -30,7 +30,7 @@ and a wide range of compute accelerators such as GPU and FPGA.
   - [C++ standard](#c-standard)
   - [Known Issues and Limitations](#known-issues-and-limitations)
     - [CUDA back-end limitations](#cuda-back-end-limitations)
-    - [ROCm back-end limitations](#rocm-back-end-limitations)
+    - [HIP back-end limitations](#hip-back-end-limitations)
   - [Find More](#find-more)
 
 ## Prerequisites
@@ -108,8 +108,8 @@ flags can be found by launching the script with `--help`):
 * `--system-ocl` -> Don't download OpenCL headers and library via CMake but use the system ones
 * `--no-werror` -> Don't treat warnings as errors when compiling llvm
 * `--cuda` -> use the cuda backend (see [Nvidia CUDA](#build-dpc-toolchain-with-support-for-nvidia-cuda))
-* `--rocm` -> use the rocm backend (see [AMD ROCm](#build-dpc-toolchain-with-support-for-amd-rocm))
-* `--rocm-platform` -> select the platform used by the rocm backend, `AMD` or `NVIDIA` (see [AMD ROCm](#build-dpc-toolchain-with-support-for-amd-rocm) or see [NVIDIA ROCm](#build-dpc-toolchain-with-support-for-nvidia-rocm))
+* `--hip` -> use the HIP backend (see [HIP](#build-dpc-toolchain-with-support-for-hip-amd))
+* `--hip-platform` -> select the platform used by the hip backend, `AMD` or `NVIDIA` (see [HIP AMD](#build-dpc-toolchain-with-support-for-hip-amd) or see [HIP NVIDIA](#build-dpc-toolchain-with-support-for-hip-nvidia))
 * '--enable-esimd-cpu-emulation' -> enable ESIMD CPU emulation (see [ESIMD CPU emulation](#build-dpc-toolchain-with-support-for-esimd-cpu))
 * `--shared-libs` -> Build shared libraries
 * `-t` -> Build type (debug or release)
@@ -161,11 +161,12 @@ a Titan RTX GPU (SM 71), but it should work on any GPU compatible with SM 50 or
 above. The default SM for the NVIDIA CUDA backend is 5.0. Users can specify
 lower values, but some features may not be supported.
 
-### Build DPC++ toolchain with support for AMD ROCm
-There is experimental support for DPC++ for ROCm devices.
+### Build DPC++ toolchain with support for HIP AMD
 
-To enable support for ROCm devices, follow the instructions for the Linux
-DPC++ toolchain, but add the `--rocm` flag to `configure.py`
+There is experimental support for DPC++ for HIP devices.
+
+To enable support for HIP devices, follow the instructions for the Linux
+DPC++ toolchain, but add the `--hip` flag to `configure.py`
 
 Enabling this flag requires an installation of
 ROCm 4.2.0 on the system, refer to
@@ -176,31 +177,31 @@ Currently, the only combination tested is Ubuntu 18.04 with ROCm 4.2.0 using a V
 [LLD](https://llvm.org/docs/AMDGPUUsage.html) is necessary for the AMD GPU compilation chain. 
 The AMDGPU backend generates a standard ELF [ELF] relocatable code object that can be linked by lld to 
 produce a standard ELF shared code object which can be loaded and executed on an AMDGPU target. 
-So if you want to support AMD ROCm, you should also build the lld project.
+So if you want to support HIP AMD, you should also build the lld project.
 [LLD Build Guide](https://lld.llvm.org/)
 
 The following CMake variables can be updated to change where CMake is looking
-for the ROCm installation:
+for the HIP installation:
 
-* `SYCL_BUILD_PI_ROCM_INCLUDE_DIR`: Path to HIP include directory (default
+* `SYCL_BUILD_PI_HIP_INCLUDE_DIR`: Path to HIP include directory (default
   `/opt/rocm/hip/include`).
-* `SYCL_BUILD_PI_ROCM_HSA_INCLUDE_DIR`: Path to HSA include directory (default
+* `SYCL_BUILD_PI_HIP_HSA_INCLUDE_DIR`: Path to HSA include directory (default
   `/opt/rocm/hsa/include`).
-* `SYCL_BUILD_PI_ROCM_AMD_LIBRARY`: Path to HIP runtime library (default
+* `SYCL_BUILD_PI_HIP_AMD_LIBRARY`: Path to HIP runtime library (default
   `/opt/rocm/hip/lib/libamdhip64.so`).
 
-### Build DPC++ toolchain with support for NVIDIA ROCm
+### Build DPC++ toolchain with support for HIP NVIDIA
 
-There is experimental support for DPC++ for using ROCm on NVIDIA devices.
+There is experimental support for DPC++ for using HIP on NVIDIA devices.
 
 This is a compatibility feature and the [CUDA backend](#build-dpc-toolchain-with-support-for-nvidia-cuda)
 should be preferred to run on NVIDIA GPUs.
 
-To enable support for NVIDIA ROCm devices, follow the instructions for the Linux
-DPC++ toolchain, but add the `--rocm` and `--rocm-platform NVIDIA` flags to
+To enable support for HIP NVIDIA devices, follow the instructions for the Linux
+DPC++ toolchain, but add the `--hip` and `--hip-platform NVIDIA` flags to
 `configure.py`.
 
-Enabling this flag requires ROCm to be installed, more specifically
+Enabling this flag requires HIP to be installed, more specifically
 [HIP NVCC](https://rocmdocs.amd.com/en/latest/Installation_Guide/HIP-Installation.html#nvidia-platform),
 as well as CUDA to be installed, see
 [NVIDIA CUDA Installation Guide for Linux](https://docs.nvidia.com/cuda/cuda-installation-guide-linux/index.html).
@@ -468,7 +469,7 @@ skipped.
 If CUDA support has been built, it is tested only if there are CUDA devices
 available.
 
-If testing with ROCm for AMD make sure to specify the GPU being used
+If testing with HIP for AMD make sure to specify the GPU being used
 by adding `-Xsycl-target-backend=amdgcn-amd-amdhsa
 --offload-arch=<target>` to the CMake variable
 `SYCL_CLANG_EXTRA_FLAGS`.
@@ -589,14 +590,14 @@ and run following command:
 clang++ -fsycl simple-sycl-app.cpp -o simple-sycl-app.exe
 ```
 
-When building for CUDA or NVIDIA ROCm, use the CUDA target triple as follows:
+When building for CUDA or HIP NVIDIA, use the CUDA target triple as follows:
 
 ```bash
 clang++ -fsycl -fsycl-targets=nvptx64-nvidia-cuda \
   simple-sycl-app.cpp -o simple-sycl-app-cuda.exe
 ```
 
-When building for ROCm, use the ROCm target triple and specify the
+When building for HIP AMD, use the AMD target triple and specify the
 target architecture with `-Xsycl-target-backend --offload-arch=<arch>`
 as follows:
 
@@ -638,8 +639,8 @@ execution, so SYCL runtime will use `default_selector` logic to select one
 of accelerators available in the system or SYCL host device.
 In this case, the behavior of the `default_selector` can be altered
 using the `SYCL_BE` environment variable, setting `PI_CUDA` forces
-the usage of the CUDA backend (if available), `PI_ROCM` forces
-the usage of the ROCm backend (if available), `PI_OPENCL` will
+the usage of the CUDA backend (if available), `PI_HIP` forces
+the usage of the HIP backend (if available), `PI_OPENCL` will
 force the usage of the OpenCL backend.
 
 ```bash
@@ -783,15 +784,15 @@ which contains all the symbols required.
 * The NVIDIA OpenCL headers conflict with the OpenCL headers required for this
   project and may cause compilation issues on some platforms
 
-### ROCm back-end limitations
+### HIP back-end limitations
 
 * For supported Operating Systems, please refer to the [Supported Operating Systems](https://github.com/RadeonOpenCompute/ROCm#supported-operating-systems)
 * The only combination tested is Ubuntu 18.04 with ROCm 4.2 using a Vega20 gfx906.
 * Judging from the current [test](https://github.com/zjin-lcf/oneAPI-DirectProgramming) results, 
-  there is still a lot of room for improvement in ROCm back-end support. The current problems include three aspects. 
+  there is still a lot of room for improvement in HIP back-end support. The current problems include three aspects. 
   The first one is at compile time: the `barrier` and `atomic` keywords are not supported. 
-  The second is at runtime: when calling `hipMemcpyDtoHAsync` ROCm API, the program will cause an exception if the input data size is too large. 
-  The third is calculation accuracy: the ROCm backend has obvious errors in the calculation results of some float type operators
+  The second is at runtime: when calling `hipMemcpyDtoHAsync` HIP API, the program will cause an exception if the input data size is too large.
+  The third is calculation accuracy: the HIP backend has obvious errors in the calculation results of some float type operators
 
 ## Find More
 

sycl/include/CL/sycl/backend_types.hpp

@@ -27,7 +27,7 @@ enum class backend : char {
   cuda = 3,
   all = 4,
   esimd_cpu = 5,
-  rocm = 6,
+  hip = 6,
 };
 
 template <backend Backend, typename SYCLObjectT> struct interop;
@@ -58,8 +58,8 @@ inline std::ostream &operator<<(std::ostream &Out, backend be) {
   case backend::esimd_cpu:
     Out << "esimd_cpu";
     break;
-  case backend::rocm:
-    Out << "rocm";
+  case backend::hip:
+    Out << "hip";
     break;
   case backend::all:
     Out << "all";

sycl/include/CL/sycl/detail/hip_definitions.hpp

@@ -1,4 +1,4 @@
-//==------------ hip_definitions.hpp - SYCL ROCM backend ------------------==//
+//==------------ hip_definitions.hpp - SYCL HIP backend -------------------==//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.

sycl/include/CL/sycl/detail/pi.hpp

@@ -66,13 +66,13 @@ bool trace(TraceLevel level);
 #define __SYCL_LEVEL_ZERO_PLUGIN_NAME "pi_level_zero.dll"
 #define __SYCL_CUDA_PLUGIN_NAME "pi_cuda.dll"
 #define __SYCL_ESIMD_CPU_PLUGIN_NAME "pi_esimd_cpu.dll"
-#define __SYCL_ROCM_PLUGIN_NAME "libpi_rocm.dll"
+#define __SYCL_HIP_PLUGIN_NAME "libpi_hip.dll"
 #else
 #define __SYCL_OPENCL_PLUGIN_NAME "libpi_opencl.so"
 #define __SYCL_LEVEL_ZERO_PLUGIN_NAME "libpi_level_zero.so"
 #define __SYCL_CUDA_PLUGIN_NAME "libpi_cuda.so"
 #define __SYCL_ESIMD_CPU_PLUGIN_NAME "libpi_esimd_cpu.so"
-#define __SYCL_ROCM_PLUGIN_NAME "libpi_rocm.so"
+#define __SYCL_HIP_PLUGIN_NAME "libpi_hip.so"
 #endif
 
 // Report error and no return (keeps compiler happy about no return statements).

sycl/plugins/CMakeLists.txt

@@ -8,8 +8,8 @@ if(SYCL_BUILD_PI_CUDA)
   add_subdirectory(cuda)
 endif()
 
-if(SYCL_BUILD_PI_ROCM)
-  add_subdirectory(rocm)
+if(SYCL_BUILD_PI_HIP)
+  add_subdirectory(hip)
 endif()
 
 add_subdirectory(opencl)

sycl/plugins/hip/CMakeLists.txt

@@ -0,0 +1,83 @@
+# Set default PI HIP platform to AMD
+set(SYCL_BUILD_PI_HIP_PLATFORM "AMD" CACHE STRING "PI HIP platform, AMD or NVIDIA")
+
+message(STATUS "Including the PI API HIP backend for ${SYCL_BUILD_PI_HIP_PLATFORM}.")
+
+# Set default HIP include dirs
+set(SYCL_BUILD_PI_HIP_INCLUDE_DIR "/opt/rocm/hip/include" CACHE STRING "HIP include dir")
+set(SYCL_BUILD_PI_HIP_HSA_INCLUDE_DIR "/opt/rocm/hsa/include" CACHE STRING "HSA include dir")
+set(HIP_HEADERS "${SYCL_BUILD_PI_HIP_INCLUDE_DIR};${SYCL_BUILD_PI_HIP_HSA_INCLUDE_DIR}")
+
+# Create pi_hip library
+add_library(pi_hip SHARED
+  "${sycl_inc_dir}/CL/sycl/detail/pi.h"
+  "${sycl_inc_dir}/CL/sycl/detail/pi.hpp"
+  "pi_hip.hpp"
+  "pi_hip.cpp"
+)
+add_dependencies(sycl-toolchain pi_hip)
+set_target_properties(pi_hip PROPERTIES LINKER_LANGUAGE CXX)
+target_link_libraries(pi_hip PUBLIC OpenCL-Headers)
+
+# Setup include directories
+target_include_directories(pi_hip
+  PRIVATE
+  ${sycl_inc_dir}
+  ${sycl_plugin_dir}
+)
+
+if("${SYCL_BUILD_PI_HIP_PLATFORM}" STREQUAL "AMD")
+  # Import HIP runtime library
+  set(SYCL_BUILD_PI_HIP_AMD_LIBRARY "/opt/rocm/hip/lib/libamdhip64.so" CACHE STRING "HIP AMD runtime library")
+  add_library(rocmdrv SHARED IMPORTED GLOBAL)
+
+  set_target_properties(
+    rocmdrv PROPERTIES
+      IMPORTED_LOCATION                    ${SYCL_BUILD_PI_HIP_AMD_LIBRARY}
+      INTERFACE_INCLUDE_DIRECTORIES        "${HIP_HEADERS}"
+      INTERFACE_SYSTEM_INCLUDE_DIRECTORIES "${HIP_HEADERS}"
+  )
+  target_link_libraries(pi_hip PUBLIC rocmdrv)
+
+  # Set HIP define to select AMD platform
+  target_compile_definitions(pi_hip PRIVATE __HIP_PLATFORM_AMD__)
+
+  # Make sure lld is built as part of the toolchain
+  add_dependencies(sycl-toolchain lld)
+elseif("${SYCL_BUILD_PI_HIP_PLATFORM}" STREQUAL "NVIDIA")
+  # Import CUDA libraries
+  find_package(CUDA REQUIRED)
+  list(APPEND HIP_HEADERS ${CUDA_INCLUDE_DIRS})
+
+  # cudadrv may be defined by the CUDA plugin
+  if(NOT TARGET cudadrv)
+    add_library(cudadrv SHARED IMPORTED GLOBAL)
+    set_target_properties(
+      cudadrv PROPERTIES
+        IMPORTED_LOCATION                    ${CUDA_CUDA_LIBRARY}
+        INTERFACE_INCLUDE_DIRECTORIES        "${HIP_HEADERS}"
+        INTERFACE_SYSTEM_INCLUDE_DIRECTORIES "${HIP_HEADERS}"
+    )
+  endif()
+
+  add_library(cudart SHARED IMPORTED GLOBAL)
+  set_target_properties(
+    cudart PROPERTIES
+      IMPORTED_LOCATION                    ${CUDA_CUDART_LIBRARY}
+      INTERFACE_INCLUDE_DIRECTORIES        "${HIP_HEADERS}"
+      INTERFACE_SYSTEM_INCLUDE_DIRECTORIES "${HIP_HEADERS}"
+  )
+  target_link_libraries(pi_hip PUBLIC cudadrv cudart)
+
+  # Set HIP define to select NVIDIA platform
+  target_compile_definitions(pi_hip PRIVATE __HIP_PLATFORM_NVIDIA__)
+else()
+  message(FATAL_ERROR "Unspecified PI HIP platform please set SYCL_BUILD_PI_HIP_PLATFORM to 'AMD' or 'NVIDIA'")
+endif()
+
+add_common_options(pi_hip)
+
+install(TARGETS pi_hip
+  LIBRARY DESTINATION "lib${LLVM_LIBDIR_SUFFIX}" COMPONENT pi_hip
+  RUNTIME DESTINATION "bin" COMPONENT pi_hip
+)