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Gang Y Chen
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[SYCL][ESIMD] Add conversion ctor and operator
Signed-off-by: Gang Y Chen <[email protected]>
1 parent 45e1b14 commit fda92f9

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4 files changed

+34
-14
lines changed

4 files changed

+34
-14
lines changed

sycl/include/CL/sycl/INTEL/esimd/esimd.hpp

Lines changed: 14 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -43,8 +43,18 @@ template <typename Ty, int N> class simd {
4343
/// @{
4444
/// Constructors.
4545
constexpr simd() = default;
46-
constexpr simd(const simd &other) { set(other.data()); }
47-
constexpr simd(simd &&other) { set(other.data()); }
46+
template <typename SrcTy> constexpr simd(const simd<SrcTy, N> &other) {
47+
if constexpr (std::is_same<SrcTy, Ty>::value)
48+
set(other.data());
49+
else
50+
set(__builtin_convertvector(other.data(), vector_type_t<Ty, N>));
51+
}
52+
template <typename SrcTy> constexpr simd(simd<SrcTy, N> &&other) {
53+
if constexpr (std::is_same<SrcTy, Ty>::value)
54+
set(other.data());
55+
else
56+
set(__builtin_convertvector(other.data(), vector_type_t<Ty, N>));
57+
}
4858
constexpr simd(const vector_type &Val) { set(Val); }
4959

5060
// TODO @rolandschulz
@@ -87,6 +97,7 @@ template <typename Ty, int N> class simd {
8797
}
8898
/// @}
8999

100+
/// conversion operator
90101
operator const vector_type &() const & { return M_data; }
91102
operator vector_type &() & { return M_data; }
92103

@@ -117,12 +128,6 @@ template <typename Ty, int N> class simd {
117128
set(Val2.data());
118129
}
119130

120-
/// {@
121-
/// Assignment operators.
122-
constexpr simd &operator=(const simd &) & = default;
123-
constexpr simd &operator=(simd &&) & = default;
124-
/// @}
125-
126131
/// View this simd object in a different element type.
127132
template <typename EltTy> auto format() & {
128133
using TopRegionTy = compute_format_type_t<simd, EltTy>;
@@ -208,6 +213,7 @@ template <typename Ty, int N> class simd {
208213
DEF_BINOP(-, -=)
209214
DEF_BINOP(*, *=)
210215
DEF_BINOP(/, /=)
216+
DEF_BINOP(%, %=)
211217

212218
#undef DEF_BINOP
213219

sycl/include/CL/sycl/INTEL/esimd/esimd_view.hpp

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -70,8 +70,13 @@ template <typename BaseTy, typename RegionTy> class simd_view {
7070
: M_base(Other.M_base), M_region(Other.M_region) {}
7171
/// @}
7272

73-
/// Conversion to simd value type.
74-
operator value_type() const { return read(); }
73+
/// Conversion to simd type.
74+
template <typename ToTy> operator simd<ToTy, length>() const {
75+
if constexpr (std::is_same<element_type, ToTy>::value)
76+
return read();
77+
else
78+
return convert<ToTy, element_type, length>(read());
79+
}
7580

7681
/// @{
7782
/// Assignment operators.
@@ -217,6 +222,7 @@ template <typename BaseTy, typename RegionTy> class simd_view {
217222
DEF_BINOP(-, -=)
218223
DEF_BINOP(*, *=)
219224
DEF_BINOP(/, /=)
225+
DEF_BINOP(%, %=)
220226

221227
#undef DEF_BINOP
222228

sycl/test/esimd/simd.cpp

Lines changed: 11 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,14 @@ bool test_simd_ctors() __attribute__((sycl_device)) {
1515
return v0[0] + v1[1] + v2[2] + v3[3] == 1 + 1 + 2 + 6;
1616
}
1717

18+
void test_conversion() __attribute__((sycl_device)) {
19+
simd<int, 32> v = 3;
20+
simd<float, 32> f = v;
21+
simd<char, 32> c = f;
22+
simd<char, 16> c1 = f.select<16, 1>(0);
23+
f = v + static_cast<simd<int, 32>>(c);
24+
}
25+
1826
bool test_1d_select() __attribute__((sycl_device)) {
1927
simd<int, 32> v = 0;
2028
v.select<8, 1>(0) = 1;
@@ -63,6 +71,7 @@ bool test_simd_bin_ops() __attribute__((sycl_device)) {
6371
simd<int, 8> v0 = 1;
6472
simd<int, 8> v1 = 2;
6573
v0 += v1;
74+
v0 %= v1;
6675
v0 = 2 - v0;
6776
v0 -= v1;
6877
v0 -= 2;
@@ -212,14 +221,12 @@ bool test_replicate2() __attribute__((sycl_device)) {
212221
simd<int, 8> v0(0, 1);
213222
auto v0_rep = v0.replicate<2, 4, 2>(1);
214223

215-
return v0_rep[0] == v0[1] && v0_rep[1] == v0[2] &&
216-
v0_rep[2] == v0[5];
224+
return v0_rep[0] == v0[1] && v0_rep[1] == v0[2] && v0_rep[2] == v0[5];
217225
}
218226

219227
bool test_replicate3() __attribute__((sycl_device)) {
220228
simd<int, 8> v0(0, 1);
221229
auto v0_rep = v0.replicate<2, 4, 2, 2>(1);
222230

223-
return v0_rep[0] == v0[1] && v0_rep[1] == v0[3] &&
224-
v0_rep[2] == v0[5];
231+
return v0_rep[0] == v0[1] && v0_rep[1] == v0[3] && v0_rep[2] == v0[5];
225232
}

sycl/test/esimd/simd_view.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -26,6 +26,7 @@ bool test_simd_view_bin_ops() __attribute__((sycl_device)) {
2626
auto ref1 = v1.select<8, 2>(0);
2727
ref0 += ref1;
2828
ref0 += 2;
29+
ref0 %= ref1;
2930
ref0 -= ref1;
3031
ref0 -= 2;
3132
ref0 *= ref1;

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