Skip to content

Commit 9feb5ca

Browse files
leewei05Groverkss
leewei05
authored and
Groverkss
committed
[llvm] Remove br i1 undef from some regression tests [NFC] (llvm#115691)
This PR aims to remove undefined behavior from tests under the directory `llvm/transforms/CodegenPrepare, ConstantHoisting, Coroutines` etc.
1 parent b8dba2b commit 9feb5ca

File tree

19 files changed

+109
-107
lines changed

19 files changed

+109
-107
lines changed

‎llvm/test/Transforms/CodeGenPrepare/X86/2008-11-24-RAUW-Self.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
44
target triple = "x86_64-unknown-linux-gnu"
55

6-
define fastcc i32 @ascii2flt(ptr %str) nounwind {
6+
define fastcc i32 @ascii2flt(ptr %str, i1 %arg) nounwind {
77
entry:
88
br label %bb2.i
99

@@ -45,7 +45,7 @@ bb10.i196.bb7.i197_crit_edge: ; No predecessors!
4545

4646
bb7.i197: ; preds = %bb10.i196.bb7.i197_crit_edge, %base2flt.exit.bb7.i197_crit_edge, %bb11.i.bb7.i197_crit_edge
4747
%.reg2mem.0 = phi i32 [ 0, %base2flt.exit.bb7.i197_crit_edge ], [ %.reg2mem.0, %bb10.i196.bb7.i197_crit_edge ], [ 0, %bb11.i.bb7.i197_crit_edge ] ; <i32> [#uses=1]
48-
br i1 undef, label %bb10.i196.base2flt.exit204_crit_edge, label %bb10.i196
48+
br i1 %arg, label %bb10.i196.base2flt.exit204_crit_edge, label %bb10.i196
4949

5050
base2flt.exit204: ; preds = %bb10.i196.base2flt.exit204_crit_edge, %base2flt.exit.base2flt.exit204_crit_edge, %bb11.i.base2flt.exit204_crit_edge
5151
br i1 false, label %base2flt.exit204.bb8_crit_edge, label %bb

‎llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -45,11 +45,11 @@ block2:
4545

4646
; Make sure the cast sink logic and OptimizeExtUses don't end up in an infinite
4747
; loop.
48-
define i128 @use_ext_source() {
48+
define i128 @use_ext_source(i1 %arg) {
4949
block1:
5050
%v1 = or i64 undef, undef
5151
%v2 = zext i64 %v1 to i128
52-
br i1 undef, label %block2, label %block3
52+
br i1 %arg, label %block2, label %block3
5353

5454
block2:
5555
%v3 = add i64 %v1, 1

‎llvm/test/Transforms/ConstantHoisting/AArch64/consthoist-unreachable.ll

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -7,11 +7,11 @@
77

88
@c.a = external global i32, align 1
99

10-
define void @c() {
10+
define void @c(i1 %arg) {
1111
; CHECK-LABEL: @c(
1212
; CHECK-NEXT: entry:
1313
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 0, 0
14-
; CHECK-NEXT: br i1 undef, label [[LBL1_US:%.*]], label [[ENTRY_ENTRY_SPLIT_CRIT_EDGE:%.*]]
14+
; CHECK-NEXT: br i1 %arg, label [[LBL1_US:%.*]], label [[ENTRY_ENTRY_SPLIT_CRIT_EDGE:%.*]]
1515
; CHECK: entry.entry.split_crit_edge:
1616
; CHECK-NEXT: [[CONST:%.*]] = bitcast i32 1232131 to i32
1717
; CHECK-NEXT: br label [[LBL1:%.*]]
@@ -21,9 +21,9 @@ define void @c() {
2121
; CHECK-NEXT: br label [[FOR_COND4:%.*]]
2222
; CHECK: lbl1:
2323
; CHECK-NEXT: store i32 [[CONST]], ptr @c.a, align 1
24-
; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[FOR_END12:%.*]]
24+
; CHECK-NEXT: br i1 %arg, label [[IF_THEN:%.*]], label [[FOR_END12:%.*]]
2525
; CHECK: if.then:
26-
; CHECK-NEXT: br i1 undef, label [[LBL1]], label [[FOR_COND4]]
26+
; CHECK-NEXT: br i1 %arg, label [[LBL1]], label [[FOR_COND4]]
2727
; CHECK: for.cond4:
2828
; CHECK-NEXT: br label [[FOR_COND4]]
2929
; CHECK: for.body9:
@@ -35,7 +35,7 @@ define void @c() {
3535
;
3636
entry:
3737
%tobool = icmp ne i16 0, 0
38-
br i1 undef, label %lbl1.us, label %entry.entry.split_crit_edge
38+
br i1 %arg, label %lbl1.us, label %entry.entry.split_crit_edge
3939

4040
entry.entry.split_crit_edge: ; preds = %entry
4141
br label %lbl1
@@ -46,10 +46,10 @@ lbl1.us: ; preds = %entry
4646

4747
lbl1: ; preds = %if.then, %entry.entry.split_crit_edge
4848
store i32 1232131, ptr @c.a, align 1
49-
br i1 undef, label %if.then, label %for.end12
49+
br i1 %arg, label %if.then, label %for.end12
5050

5151
if.then: ; preds = %lbl1
52-
br i1 undef, label %lbl1, label %for.cond4
52+
br i1 %arg, label %lbl1, label %for.cond4
5353

5454
for.cond4: ; preds = %for.cond4, %if.then, %lbl1.us
5555
br label %for.cond4

‎llvm/test/Transforms/ConstantHoisting/ARM/same-offset-multi-types.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -26,9 +26,9 @@ target triple = "thumbv6m-none--musleabi"
2626
@global = external dso_local global %0, align 4
2727

2828
; Function Attrs: nounwind optsize ssp
29-
define dso_local void @zot() {
29+
define dso_local void @zot(i1 %arg) {
3030
bb:
31-
br i1 undef, label %bb2, label %bb1
31+
br i1 %arg, label %bb2, label %bb1
3232

3333
bb1: ; preds = %bb
3434
%tmp = load ptr, ptr getelementptr inbounds (%0, ptr @global, i32 0, i32 2, i32 0), align 4

‎llvm/test/Transforms/ConstantHoisting/PowerPC/masks.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3,18 +3,18 @@ target datalayout = "E-m:e-i64:64-n32:64"
33
target triple = "powerpc64-unknown-linux-gnu"
44

55
; Here the masks are all contiguous, and should not be hoisted.
6-
define i32 @test1() nounwind {
6+
define i32 @test1(i1 %arg) nounwind {
77
entry:
88
; CHECK-LABEL: @test1
99
; CHECK-NOT: bitcast i32 65535 to i32
1010
; CHECK: and i32 undef, 65535
1111
%conv121 = and i32 undef, 65535
12-
br i1 undef, label %if.then152, label %if.end167
12+
br i1 %arg, label %if.then152, label %if.end167
1313

1414
if.then152:
1515
; CHECK: and i32 undef, 65535
1616
%conv153 = and i32 undef, 65535
17-
br i1 undef, label %if.end167, label %end2
17+
br i1 %arg, label %if.end167, label %end2
1818

1919
if.end167:
2020
; CHECK: and i32 {{.*}}, 32768
@@ -35,16 +35,16 @@ end2:
3535
}
3636

3737
; Here the masks are not contiguous, and should be hoisted.
38-
define i32 @test2() nounwind {
38+
define i32 @test2(i1 %arg) nounwind {
3939
entry:
4040
; CHECK-LABEL: @test2
4141
; CHECK: bitcast i32 65531 to i32
4242
%conv121 = and i32 undef, 65531
43-
br i1 undef, label %if.then152, label %if.end167
43+
br i1 %arg, label %if.then152, label %if.end167
4444

4545
if.then152:
4646
%conv153 = and i32 undef, 65531
47-
br i1 undef, label %if.end167, label %end2
47+
br i1 %arg, label %if.end167, label %end2
4848

4949
if.end167:
5050
; CHECK: add i32 {{.*}}, -32758

‎llvm/test/Transforms/ConstantHoisting/X86/pr43903-not-all-uses-rebased.ll

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -8,12 +8,12 @@ target triple = "x86_64-unknown-linux-gnu"
88

99
@a = external global [2 x i16], align 1
1010

11-
define void @c() {
11+
define void @c(i1 %arg) {
1212
; CHECK-LABEL: @c(
1313
; CHECK-NEXT: for.cond:
14-
; CHECK-NEXT: br i1 undef, label [[FOR_BODY2:%.*]], label [[FOR_END4:%.*]]
14+
; CHECK-NEXT: br i1 %arg, label [[FOR_BODY2:%.*]], label [[FOR_END4:%.*]]
1515
; CHECK: for.body2:
16-
; CHECK-NEXT: br i1 undef, label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
16+
; CHECK-NEXT: br i1 %arg, label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
1717
; CHECK: land.rhs:
1818
; CHECK-NEXT: unreachable
1919
; CHECK: land.end:
@@ -27,10 +27,10 @@ define void @c() {
2727
; CHECK-NEXT: ret void
2828
;
2929
for.cond:
30-
br i1 undef, label %for.body2, label %for.end4
30+
br i1 %arg, label %for.body2, label %for.end4
3131

3232
for.body2: ; preds = %for.cond
33-
br i1 undef, label %land.rhs, label %land.end
33+
br i1 %arg, label %land.rhs, label %land.end
3434

3535
land.rhs: ; preds = %for.body2
3636
unreachable

‎llvm/test/Transforms/Coroutines/coro-async-remat.ll

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ entry:
2424
ret ptr undef
2525
}
2626

27-
define swifttailcc void @repo(ptr %0, ptr %1, ptr %arg, ptr %2) #1 {
27+
define swifttailcc void @repo(ptr %0, ptr %1, ptr %arg, ptr %2, i1 %arg2) #1 {
2828
entry:
2929
%swifterror = alloca swifterror ptr, align 8
3030
%3 = call token @llvm.coro.id.async(i32 20, i32 16, i32 1, ptr @repoTU)
@@ -33,21 +33,21 @@ entry:
3333
br label %6
3434

3535
6: ; preds = %21, %15, %entry
36-
br i1 undef, label %7, label %23
36+
br i1 %arg2, label %7, label %23
3737

3838
7: ; preds = %6
39-
br i1 undef, label %8, label %16
39+
br i1 %arg2, label %8, label %16
4040

4141
8: ; preds = %7
4242
%initializeWithTake35 = bitcast ptr undef to ptr
4343
%9 = call ptr %initializeWithTake35(ptr noalias %5, ptr noalias undef, ptr undef) #0
4444
%10 = call ptr @llvm.coro.async.resume()
4545
%11 = bitcast ptr %10 to ptr
4646
%12 = call { ptr, ptr } (i32, ptr, ptr, ...) @llvm.coro.suspend.async.sl_p0i8p0s_swift.error.4.220.413.429.445.461.672.683ss(i32 256, ptr %10, ptr @__swift_async_resume_project_context, ptr @__swift_suspend_dispatch_5.23, ptr undef, ptr undef, ptr undef, ptr %5, ptr undef, ptr undef)
47-
br i1 undef, label %25, label %13
47+
br i1 %arg2, label %25, label %13
4848

4949
13: ; preds = %8
50-
br i1 undef, label %14, label %15
50+
br i1 %arg2, label %14, label %15
5151

5252
14: ; preds = %13
5353
br label %24
@@ -56,16 +56,16 @@ entry:
5656
br label %6
5757

5858
16: ; preds = %7
59-
br i1 undef, label %26, label %17
59+
br i1 %arg2, label %26, label %17
6060

6161
17: ; preds = %16
62-
br i1 undef, label %18, label %22
62+
br i1 %arg2, label %18, label %22
6363

6464
18: ; preds = %17
65-
br i1 undef, label %27, label %19
65+
br i1 %arg2, label %27, label %19
6666

6767
19: ; preds = %18
68-
br i1 undef, label %20, label %21
68+
br i1 %arg2, label %20, label %21
6969

7070
20: ; preds = %19
7171
br label %24

‎llvm/test/Transforms/CorrelatedValuePropagation/2010-09-26-MergeConstantRange.ll

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
@g_128 = external global %struct.S2, align 1
66
@g_106 = external global i16, align 2
77

8-
define void @int328(i16 signext %p_82) noreturn nounwind ssp {
8+
define void @int328(i16 signext %p_82, i1 %arg) noreturn nounwind ssp {
99
entry:
1010
%tobool3 = icmp eq i16 %p_82, 0
1111
br label %for.cond.outer
@@ -32,7 +32,7 @@ for.cond.split.us: ; preds = %for.cond
3232
br label %lbl_133.us
3333

3434
lbl_133.us: ; preds = %lbl_134.us, %for.cond.split.us
35-
br i1 undef, label %if.else14.us-lcssa.us, label %if.then.us
35+
br i1 %arg, label %if.else14.us-lcssa.us, label %if.then.us
3636

3737
lbl_134.us: ; preds = %if.then.us
3838
%cmp = icmp eq i16 ptrtoint (ptr @g_128 to i16), 0
@@ -66,7 +66,7 @@ for.cond9.preheader.us-lcssa: ; preds = %lbl_134
6666
br label %for.cond9.preheader
6767

6868
for.cond9.preheader: ; preds = %for.cond9.preheader.us-lcssa, %for.cond9.preheader.us-lcssa.us
69-
br i1 undef, label %bb.nph, label %for.cond.loopexit
69+
br i1 %arg, label %bb.nph, label %for.cond.loopexit
7070

7171
bb.nph: ; preds = %for.cond9.preheader
7272
br label %for.cond.loopexit

‎llvm/test/Transforms/CorrelatedValuePropagation/basic.ll

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1458,12 +1458,12 @@ entry:
14581458
ret i1 %cmp
14591459
}
14601460

1461-
define i1 @srem_unknown(i32 %a) {
1461+
define i1 @srem_unknown(i32 %a, i1 %arg) {
14621462
; CHECK-LABEL: define i1 @srem_unknown
1463-
; CHECK-SAME: (i32 [[A:%.*]]) {
1463+
; CHECK-SAME: (i32 [[A:%.*]], i1 [[ARG:%.*]]) {
14641464
; CHECK-NEXT: entry:
14651465
; CHECK-NEXT: [[SREM:%.*]] = srem i32 [[A]], 30
1466-
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
1466+
; CHECK-NEXT: br i1 [[ARG]], label [[EXIT1:%.*]], label [[EXIT2:%.*]]
14671467
; CHECK: exit1:
14681468
; CHECK-NEXT: ret i1 true
14691469
; CHECK: exit2:
@@ -1473,19 +1473,19 @@ entry:
14731473
%srem = srem i32 %a, 30
14741474
%cmp1 = icmp slt i32 %srem, 30
14751475
%cmp2 = icmp sgt i32 %srem, -30
1476-
br i1 undef, label %exit1, label %exit2
1476+
br i1 %arg, label %exit1, label %exit2
14771477
exit1:
14781478
ret i1 %cmp1
14791479
exit2:
14801480
ret i1 %cmp2
14811481
}
14821482

1483-
define i1 @sdiv_unknown(i32 %a) {
1483+
define i1 @sdiv_unknown(i32 %a, i1 %arg) {
14841484
; CHECK-LABEL: define i1 @sdiv_unknown
1485-
; CHECK-SAME: (i32 [[A:%.*]]) {
1485+
; CHECK-SAME: (i32 [[A:%.*]], i1 [[ARG:%.*]]) {
14861486
; CHECK-NEXT: entry:
14871487
; CHECK-NEXT: [[SREM:%.*]] = sdiv i32 [[A]], 123
1488-
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
1488+
; CHECK-NEXT: br i1 [[ARG]], label [[EXIT1:%.*]], label [[EXIT2:%.*]]
14891489
; CHECK: exit1:
14901490
; CHECK-NEXT: ret i1 true
14911491
; CHECK: exit2:
@@ -1495,20 +1495,20 @@ entry:
14951495
%srem = sdiv i32 %a, 123
14961496
%cmp1 = icmp slt i32 %srem, 17459217
14971497
%cmp2 = icmp sgt i32 %srem, -17459217
1498-
br i1 undef, label %exit1, label %exit2
1498+
br i1 %arg, label %exit1, label %exit2
14991499
exit1:
15001500
ret i1 %cmp1
15011501
exit2:
15021502
ret i1 %cmp2
15031503
}
15041504

1505-
define i1 @uadd_sat_unknown(i32 %a) {
1505+
define i1 @uadd_sat_unknown(i32 %a, i1 %arg) {
15061506
; CHECK-LABEL: define i1 @uadd_sat_unknown
1507-
; CHECK-SAME: (i32 [[A:%.*]]) {
1507+
; CHECK-SAME: (i32 [[A:%.*]], i1 [[ARG:%.*]]) {
15081508
; CHECK-NEXT: entry:
15091509
; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[A]], i32 100)
15101510
; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 [[VAL]], 100
1511-
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
1511+
; CHECK-NEXT: br i1 [[ARG]], label [[EXIT1:%.*]], label [[EXIT2:%.*]]
15121512
; CHECK: exit1:
15131513
; CHECK-NEXT: ret i1 true
15141514
; CHECK: exit2:
@@ -1518,20 +1518,20 @@ entry:
15181518
%val = call i32 @llvm.uadd.sat.i32(i32 %a, i32 100)
15191519
%cmp1 = icmp uge i32 %val, 100
15201520
%cmp2 = icmp ugt i32 %val, 100
1521-
br i1 undef, label %exit1, label %exit2
1521+
br i1 %arg, label %exit1, label %exit2
15221522
exit1:
15231523
ret i1 %cmp1
15241524
exit2:
15251525
ret i1 %cmp2
15261526
}
15271527

1528-
define i1 @usub_sat_unknown(i32 %a) {
1528+
define i1 @usub_sat_unknown(i32 %a, i1 %arg) {
15291529
; CHECK-LABEL: define i1 @usub_sat_unknown
1530-
; CHECK-SAME: (i32 [[A:%.*]]) {
1530+
; CHECK-SAME: (i32 [[A:%.*]], i1 [[ARG:%.*]]) {
15311531
; CHECK-NEXT: entry:
15321532
; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[A]], i32 100)
15331533
; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[VAL]], -101
1534-
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
1534+
; CHECK-NEXT: br i1 [[ARG]], label [[EXIT1:%.*]], label [[EXIT2:%.*]]
15351535
; CHECK: exit1:
15361536
; CHECK-NEXT: ret i1 true
15371537
; CHECK: exit2:
@@ -1541,20 +1541,20 @@ entry:
15411541
%val = call i32 @llvm.usub.sat.i32(i32 %a, i32 100)
15421542
%cmp1 = icmp ule i32 %val, 4294967195
15431543
%cmp2 = icmp ult i32 %val, 4294967195
1544-
br i1 undef, label %exit1, label %exit2
1544+
br i1 %arg, label %exit1, label %exit2
15451545
exit1:
15461546
ret i1 %cmp1
15471547
exit2:
15481548
ret i1 %cmp2
15491549
}
15501550

1551-
define i1 @sadd_sat_unknown(i32 %a) {
1551+
define i1 @sadd_sat_unknown(i32 %a, i1 %arg) {
15521552
; CHECK-LABEL: define i1 @sadd_sat_unknown
1553-
; CHECK-SAME: (i32 [[A:%.*]]) {
1553+
; CHECK-SAME: (i32 [[A:%.*]], i1 [[ARG:%.*]]) {
15541554
; CHECK-NEXT: entry:
15551555
; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[A]], i32 100)
15561556
; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[VAL]], -2147483548
1557-
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
1557+
; CHECK-NEXT: br i1 [[ARG]], label [[EXIT1:%.*]], label [[EXIT2:%.*]]
15581558
; CHECK: exit1:
15591559
; CHECK-NEXT: ret i1 true
15601560
; CHECK: exit2:
@@ -1564,20 +1564,20 @@ entry:
15641564
%val = call i32 @llvm.sadd.sat.i32(i32 %a, i32 100)
15651565
%cmp1 = icmp sge i32 %val, -2147483548
15661566
%cmp2 = icmp sgt i32 %val, -2147483548
1567-
br i1 undef, label %exit1, label %exit2
1567+
br i1 %arg, label %exit1, label %exit2
15681568
exit1:
15691569
ret i1 %cmp1
15701570
exit2:
15711571
ret i1 %cmp2
15721572
}
15731573

1574-
define i1 @ssub_sat_unknown(i32 %a) {
1574+
define i1 @ssub_sat_unknown(i32 %a, i1 %arg) {
15751575
; CHECK-LABEL: define i1 @ssub_sat_unknown
1576-
; CHECK-SAME: (i32 [[A:%.*]]) {
1576+
; CHECK-SAME: (i32 [[A:%.*]], i1 [[ARG:%.*]]) {
15771577
; CHECK-NEXT: entry:
15781578
; CHECK-NEXT: [[VAL:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[A]], i32 100)
15791579
; CHECK-NEXT: [[CMP2:%.*]] = icmp slt i32 [[VAL]], 2147483547
1580-
; CHECK-NEXT: br i1 undef, label [[EXIT1:%.*]], label [[EXIT2:%.*]]
1580+
; CHECK-NEXT: br i1 [[ARG]], label [[EXIT1:%.*]], label [[EXIT2:%.*]]
15811581
; CHECK: exit1:
15821582
; CHECK-NEXT: ret i1 true
15831583
; CHECK: exit2:
@@ -1587,7 +1587,7 @@ entry:
15871587
%val = call i32 @llvm.ssub.sat.i32(i32 %a, i32 100)
15881588
%cmp1 = icmp sle i32 %val, 2147483547
15891589
%cmp2 = icmp slt i32 %val, 2147483547
1590-
br i1 undef, label %exit1, label %exit2
1590+
br i1 %arg, label %exit1, label %exit2
15911591
exit1:
15921592
ret i1 %cmp1
15931593
exit2:

0 commit comments

Comments
 (0)