Skip to content

Commit 846fbb0

Browse files
committed
[DAGCombiner][RISCV] Return SDValue(N, 0) instead of SDValue() after 2 calls to CombineTo in visitSTORE.
RISC-V found a case where the CombineTo caused N to be CSEd with an existing node and then deleted. The top level DAGCombiner loop was surprised to find a node was deleted, but SDValue() was returned from the visit function. We need to return SDValue(N, 0) to tell the top level loop that a change was made, but the worklist updates were already handled. Fixes llvm#64772. Reviewed By: arsenm Differential Revision: https://reviews.llvm.org/D158208
1 parent ebb2e5e commit 846fbb0

File tree

2 files changed

+19
-2
lines changed

2 files changed

+19
-2
lines changed

llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -20716,7 +20716,7 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
2071620716
TypeSize::isKnownLE(ST1->getMemoryVT().getStoreSize(),
2071720717
ST->getMemoryVT().getStoreSize())) {
2071820718
CombineTo(ST1, ST1->getChain());
20719-
return SDValue();
20719+
return SDValue(N, 0);
2072020720
}
2072120721
} else {
2072220722
const BaseIndexOffset STBase = BaseIndexOffset::match(ST, DAG);
@@ -20729,7 +20729,7 @@ SDValue DAGCombiner::visitSTORE(SDNode *N) {
2072920729
ChainBase,
2073020730
ST1->getMemoryVT().getFixedSizeInBits())) {
2073120731
CombineTo(ST1, ST1->getChain());
20732-
return SDValue();
20732+
return SDValue(N, 0);
2073320733
}
2073420734
}
2073520735
}

llvm/test/CodeGen/RISCV/pr64772.ll

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2+
; RUN: llc < %s -mtriple=riscv64 | FileCheck %s
3+
4+
define void @f() {
5+
; CHECK-LABEL: f:
6+
; CHECK: # %bb.0:
7+
; CHECK-NEXT: sb zero, 0(zero)
8+
; CHECK-NEXT: ret
9+
%B1 = shl i64 -9223372036854775808, 0
10+
%LGV6 = load i8, ptr null, align 1
11+
%G3 = getelementptr i32, ptr null, i64 %B1
12+
%B5 = ashr i64 -9223372036854775808, 0
13+
store i1 false, ptr %G3, align 1
14+
store i8 1, ptr null, align 1
15+
store i1 false, ptr null, align 1
16+
ret void
17+
}

0 commit comments

Comments
 (0)