fixup! Merge in changes from llvm#132060

Author: jthackray

clang/lib/CodeGen/CGBuiltin.cpp

@@ -2572,8 +2572,8 @@ static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF,
   if (AccessKind != Write) {
     assert(AccessKind == NormalRead || AccessKind == VolatileRead);
     llvm::Function *F = CGM.getIntrinsic(
-        AccessKind == VolatileRead ? llvm::Intrinsic::read_volatile_register
-                                   : llvm::Intrinsic::read_register,
+        AccessKind == VolatileRead ? Intrinsic::read_volatile_register
+                                   : Intrinsic::read_register,
         Types);
     llvm::Value *Call = Builder.CreateCall(F, Metadata);
 
@@ -2588,7 +2588,7 @@ static Value *EmitSpecialRegisterBuiltin(CodeGenFunction &CGF,
     return Call;
   }
 
-  llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types);
+  llvm::Function *F = CGM.getIntrinsic(Intrinsic::write_register, Types);
   llvm::Value *ArgValue = CGF.EmitScalarExpr(E->getArg(1));
   if (MixedTypes) {
     // Extend 32 bit write value to 64 bit to pass to write.
@@ -4934,7 +4934,7 @@ Value *readX18AsPtr(CodeGenFunction &CGF) {
   llvm::MDNode *RegName = llvm::MDNode::get(Context, Ops);
   llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName);
   llvm::Function *F =
-      CGF.CGM.getIntrinsic(llvm::Intrinsic::read_register, {CGF.Int64Ty});
+      CGF.CGM.getIntrinsic(Intrinsic::read_register, {CGF.Int64Ty});
   llvm::Value *X18 = CGF.Builder.CreateCall(F, Metadata);
   return CGF.Builder.CreateIntToPtr(X18, CGF.Int8PtrTy);
 }
@@ -5272,7 +5272,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
     llvm::Value *Metadata = llvm::MetadataAsValue::get(Context, RegName);
 
     llvm::Function *F =
-        CGM.getIntrinsic(llvm::Intrinsic::read_register, {Int64Ty});
+        CGM.getIntrinsic(Intrinsic::read_register, {Int64Ty});
     return Builder.CreateCall(F, Metadata);
   }
 
@@ -5281,7 +5281,7 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
     if (!E->getArg(0)->EvaluateAsInt(Result, CGM.getContext()))
       llvm_unreachable("Sema will ensure that the parameter is constant");
 
-    llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::aarch64_break);
+    llvm::Function *F = CGM.getIntrinsic(Intrinsic::aarch64_break);
     return Builder.CreateCall(F, {EmitScalarExpr(E->getArg(0))});
   }
 
@@ -5470,12 +5470,12 @@ Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
     llvm::Type *Types[] = { RegisterType };
 
     if (BuiltinID == clang::AArch64::BI_ReadStatusReg) {
-      llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::read_register, Types);
+      llvm::Function *F = CGM.getIntrinsic(Intrinsic::read_register, Types);
 
       return Builder.CreateCall(F, Metadata);
     }
 
-    llvm::Function *F = CGM.getIntrinsic(llvm::Intrinsic::write_register, Types);
+    llvm::Function *F = CGM.getIntrinsic(Intrinsic::write_register, Types);
     llvm::Value *ArgValue = EmitScalarExpr(E->getArg(1));
 
     return Builder.CreateCall(F, { Metadata, ArgValue });
@@ -7892,8 +7892,8 @@ Value *CodeGenFunction::EmitBPFBuiltinExpr(unsigned BuiltinID,
     Value *InfoKind = ConstantInt::get(Int64Ty, C->getSExtValue());
 
     // Built the IR for the preserve_field_info intrinsic.
-    llvm::Function *FnGetFieldInfo = llvm::Intrinsic::getOrInsertDeclaration(
-        &CGM.getModule(), llvm::Intrinsic::bpf_preserve_field_info,
+    llvm::Function *FnGetFieldInfo = Intrinsic::getOrInsertDeclaration(
+        &CGM.getModule(), Intrinsic::bpf_preserve_field_info,
         {FieldAddr->getType()});
     return Builder.CreateCall(FnGetFieldInfo, {FieldAddr, InfoKind});
   }
@@ -7914,11 +7914,11 @@ Value *CodeGenFunction::EmitBPFBuiltinExpr(unsigned BuiltinID,
 
     llvm::Function *FnDecl;
     if (BuiltinID == BPF::BI__builtin_btf_type_id)
-      FnDecl = llvm::Intrinsic::getOrInsertDeclaration(
-          &CGM.getModule(), llvm::Intrinsic::bpf_btf_type_id, {});
+      FnDecl = Intrinsic::getOrInsertDeclaration(
+          &CGM.getModule(), Intrinsic::bpf_btf_type_id, {});
     else
-      FnDecl = llvm::Intrinsic::getOrInsertDeclaration(
-          &CGM.getModule(), llvm::Intrinsic::bpf_preserve_type_info, {});
+      FnDecl = Intrinsic::getOrInsertDeclaration(
+          &CGM.getModule(), Intrinsic::bpf_preserve_type_info, {});
     CallInst *Fn = Builder.CreateCall(FnDecl, {SeqNumVal, FlagValue});
     Fn->setMetadata(LLVMContext::MD_preserve_access_index, DbgInfo);
     return Fn;
@@ -7952,8 +7952,8 @@ Value *CodeGenFunction::EmitBPFBuiltinExpr(unsigned BuiltinID,
     Value *FlagValue = ConstantInt::get(Int64Ty, Flag->getSExtValue());
     Value *SeqNumVal = ConstantInt::get(Int32Ty, BuiltinSeqNum++);
 
-    llvm::Function *IntrinsicFn = llvm::Intrinsic::getOrInsertDeclaration(
-        &CGM.getModule(), llvm::Intrinsic::bpf_preserve_enum_value, {});
+    llvm::Function *IntrinsicFn = Intrinsic::getOrInsertDeclaration(
+        &CGM.getModule(), Intrinsic::bpf_preserve_enum_value, {});
     CallInst *Fn =
         Builder.CreateCall(IntrinsicFn, {SeqNumVal, EnumStrVal, FlagValue});
     Fn->setMetadata(LLVMContext::MD_preserve_access_index, DbgInfo);

clang/lib/CodeGen/TargetBuiltins/AArch64.cpp

@@ -209,7 +209,7 @@ static Value *handleAsDoubleBuiltin(CodeGenFunction &CGF, const CallExpr *E) {
   if (CGF.CGM.getTarget().getTriple().isDXIL())
     return CGF.Builder.CreateIntrinsic(
         /*ReturnType=*/ResultType, Intrinsic::dx_asdouble,
-        ArrayRef<Value *>{OpLowBits, OpHighBits}, nullptr, "hlsl.asdouble");
+        {OpLowBits, OpHighBits}, nullptr, "hlsl.asdouble");
 
   if (!E->getArg(0)->getType()->isVectorType()) {
     OpLowBits = CGF.Builder.CreateVectorSplat(1, OpLowBits);
@@ -240,13 +240,13 @@ static Value *handleHlslClip(const CallExpr *E, CodeGenFunction *CGF) {
     auto *FCompInst = CGF->Builder.CreateFCmpOLT(Op0, FZeroConst);
     CMP = CGF->Builder.CreateIntrinsic(
         CGF->Builder.getInt1Ty(), CGF->CGM.getHLSLRuntime().getAnyIntrinsic(),
-        {FCompInst}, nullptr);
+        {FCompInst});
   } else
     CMP = CGF->Builder.CreateFCmpOLT(Op0, FZeroConst);
 
   if (CGF->CGM.getTarget().getTriple().isDXIL())
     LastInstr = CGF->Builder.CreateIntrinsic(
-        CGF->VoidTy, llvm::Intrinsic::dx_discard, {CMP}, nullptr);
+        CGF->VoidTy, Intrinsic::dx_discard, {CMP});
   else if (CGF->CGM.getTarget().getTriple().isSPIRV()) {
     BasicBlock *LT0 = CGF->createBasicBlock("lt0", CGF->CurFn);
     BasicBlock *End = CGF->createBasicBlock("end", CGF->CurFn);
@@ -255,11 +255,9 @@ static Value *handleHlslClip(const CallExpr *E, CodeGenFunction *CGF) {
 
     CGF->Builder.SetInsertPoint(LT0);
 
-    CGF->Builder.CreateIntrinsic(CGF->VoidTy, llvm::Intrinsic::spv_discard, {},
-                                 nullptr);
+    CGF->Builder.CreateIntrinsic(CGF->VoidTy, Intrinsic::spv_discard, {});
 
     LastInstr = CGF->Builder.CreateBr(End);
-
     CGF->Builder.SetInsertPoint(End);
   } else {
     llvm_unreachable("Backend Codegen not supported.");
@@ -442,11 +440,11 @@ static Intrinsic::ID getWaveActiveSumIntrinsic(llvm::Triple::ArchType Arch,
                                                CGHLSLRuntime &RT, QualType QT) {
   switch (Arch) {
   case llvm::Triple::spirv:
-    return llvm::Intrinsic::spv_wave_reduce_sum;
+    return Intrinsic::spv_wave_reduce_sum;
   case llvm::Triple::dxil: {
     if (QT->isUnsignedIntegerType())
-      return llvm::Intrinsic::dx_wave_reduce_usum;
-    return llvm::Intrinsic::dx_wave_reduce_sum;
+      return Intrinsic::dx_wave_reduce_usum;
+    return Intrinsic::dx_wave_reduce_sum;
   }
   default:
     llvm_unreachable("Intrinsic WaveActiveSum"
@@ -460,12 +458,12 @@ static Intrinsic::ID getWaveActiveMaxIntrinsic(llvm::Triple::ArchType Arch,
   switch (Arch) {
   case llvm::Triple::spirv:
     if (QT->isUnsignedIntegerType())
-      return llvm::Intrinsic::spv_wave_reduce_umax;
-    return llvm::Intrinsic::spv_wave_reduce_max;
+      return Intrinsic::spv_wave_reduce_umax;
+    return Intrinsic::spv_wave_reduce_max;
   case llvm::Triple::dxil: {
     if (QT->isUnsignedIntegerType())
-      return llvm::Intrinsic::dx_wave_reduce_umax;
-    return llvm::Intrinsic::dx_wave_reduce_max;
+      return Intrinsic::dx_wave_reduce_umax;
+    return Intrinsic::dx_wave_reduce_max;
   }
   default:
     llvm_unreachable("Intrinsic WaveActiveMax"
@@ -504,17 +502,17 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
       LowB = Builder.CreateExtractElement(OpB, (uint64_t)0, "LowB");
       HighB = Builder.CreateExtractElement(OpB, (uint64_t)1, "HighB");
     } else {
-      LowA = Builder.CreateShuffleVector(OpA, ArrayRef<int>{0, 2}, "LowA");
-      HighA = Builder.CreateShuffleVector(OpA, ArrayRef<int>{1, 3}, "HighA");
-      LowB = Builder.CreateShuffleVector(OpB, ArrayRef<int>{0, 2}, "LowB");
-      HighB = Builder.CreateShuffleVector(OpB, ArrayRef<int>{1, 3}, "HighB");
+      LowA = Builder.CreateShuffleVector(OpA, {0, 2}, "LowA");
+      HighA = Builder.CreateShuffleVector(OpA, {1, 3}, "HighA");
+      LowB = Builder.CreateShuffleVector(OpB, {0, 2}, "LowB");
+      HighB = Builder.CreateShuffleVector(OpB, {1, 3}, "HighB");
     }
 
     // Use an uadd_with_overflow to compute the sum of low words and obtain a
     // carry value
     llvm::Value *Carry;
     llvm::Value *LowSum = EmitOverflowIntrinsic(
-        *this, llvm::Intrinsic::uadd_with_overflow, LowA, LowB, Carry);
+        *this, Intrinsic::uadd_with_overflow, LowA, LowB, Carry);
     llvm::Value *ZExtCarry =
         Builder.CreateZExt(Carry, HighA->getType(), "CarryZExt");
 
@@ -525,7 +523,7 @@ Value *CodeGenFunction::EmitHLSLBuiltinExpr(unsigned BuiltinID,
 
     if (NumElements == 4) {
       return Builder.CreateShuffleVector(LowSum, HighSumPlusCarry,
-                                         ArrayRef<int>{0, 2, 1, 3},
+                                         {0, 2, 1, 3},
                                          "hlsl.AddUint64");
     }
 
@@ -1341,11 +1339,11 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
     // The builtins take these arguments as vec4 where the last element is
     // ignored. The intrinsic takes them as vec3.
     RayOrigin = Builder.CreateShuffleVector(RayOrigin, RayOrigin,
-                                            ArrayRef<int>{0, 1, 2});
+                                            {0, 1, 2});
     RayDir =
-        Builder.CreateShuffleVector(RayDir, RayDir, ArrayRef<int>{0, 1, 2});
+        Builder.CreateShuffleVector(RayDir, RayDir, {0, 1, 2});
     RayInverseDir = Builder.CreateShuffleVector(RayInverseDir, RayInverseDir,
-                                                ArrayRef<int>{0, 1, 2});
+                                                {0, 1, 2});
 
     Function *F = CGM.getIntrinsic(Intrinsic::amdgcn_image_bvh_intersect_ray,
                                    {NodePtr->getType(), RayDir->getType()});

clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp

@@ -149,10 +149,9 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
     StringRef CPUStr = cast<clang::StringLiteral>(CPUExpr)->getString();
     llvm::Triple Triple = getTarget().getTriple();
 
-    unsigned LinuxSupportMethod, LinuxIDValue, AIXSupportMethod, AIXIDValue;
     typedef std::tuple<unsigned, unsigned, unsigned, unsigned> CPUInfo;
 
-    std::tie(LinuxSupportMethod, LinuxIDValue, AIXSupportMethod, AIXIDValue) =
+    auto [LinuxSupportMethod, LinuxIDValue, AIXSupportMethod, AIXIDValue] =
         static_cast<CPUInfo>(StringSwitch<CPUInfo>(CPUStr)
 #define PPC_CPU(NAME, Linux_SUPPORT_METHOD, LinuxID, AIX_SUPPORT_METHOD,       \
                 AIXID)                                                         \
@@ -188,12 +187,10 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
     const Expr *CPUExpr = E->getArg(0)->IgnoreParenCasts();
     StringRef CPUStr = cast<clang::StringLiteral>(CPUExpr)->getString();
     if (Triple.isOSAIX()) {
-      unsigned SupportMethod, FieldIdx, Mask, Value;
-      CmpInst::Predicate CompOp;
       typedef std::tuple<unsigned, unsigned, unsigned, CmpInst::Predicate,
                          unsigned>
           CPUSupportType;
-      std::tie(SupportMethod, FieldIdx, Mask, CompOp, Value) =
+      auto [SupportMethod, FieldIdx, Mask, CompOp, Value] =
           static_cast<CPUSupportType>(StringSwitch<CPUSupportType>(CPUStr)
 #define PPC_AIX_FEATURE(NAME, DESC, SUPPORT_METHOD, INDEX, MASK, COMP_OP,      \
                         VALUE)                                                 \
@@ -207,9 +204,7 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
 
     assert(Triple.isOSLinux() &&
            "__builtin_cpu_supports() is only supported for AIX and Linux.");
-    unsigned FeatureWord;
-    unsigned BitMask;
-    std::tie(FeatureWord, BitMask) =
+    auto [FeatureWord, BitMask] =
         StringSwitch<std::pair<unsigned, unsigned>>(CPUStr)
 #define PPC_LNX_FEATURE(Name, Description, EnumName, Bitmask, FA_WORD)         \
   .Case(Name, {FA_WORD, Bitmask})
@@ -935,7 +930,7 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
     if (getTarget().isLittleEndian()) {
       // Reverse the double words in the vector we will extract from.
       Op0 = Builder.CreateBitCast(Op0, llvm::FixedVectorType::get(Int64Ty, 2));
-      Op0 = Builder.CreateShuffleVector(Op0, Op0, ArrayRef<int>{1, 0});
+      Op0 = Builder.CreateShuffleVector(Op0, Op0, {1, 0});
 
       // Reverse the index.
       Index = MaxIndex - Index;
@@ -972,7 +967,7 @@ Value *CodeGenFunction::EmitPPCBuiltinExpr(unsigned BuiltinID,
       Value *Call = Builder.CreateCall(F, {Op0, Op1});
 
       Value *ShuffleCall =
-          Builder.CreateShuffleVector(Call, Call, ArrayRef<int>{1, 0});
+          Builder.CreateShuffleVector(Call, Call, {1, 0});
       return ShuffleCall;
     } else {
       Op1 = ConstantInt::getSigned(Int32Ty, Index);

clang/lib/CodeGen/TargetBuiltins/PPC.cpp

@@ -372,7 +372,7 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
     Function *Callee = CGM.getIntrinsic(IntNo, {TruncT, SrcT});
     Value *Trunc = Builder.CreateCall(Callee, Vec);
     Value *Splat = Constant::getNullValue(TruncT);
-    return Builder.CreateShuffleVector(Trunc, Splat, ArrayRef<int>{0, 1, 2, 3});
+    return Builder.CreateShuffleVector(Trunc, Splat, {0, 1, 2, 3});
   }
   case WebAssembly::BI__builtin_wasm_shuffle_i8x16: {
     Value *Ops[18];