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Merge branch 'mdio-support-updates'
Nikita Yushchenko says: ==================== rswitch: mdio support updates This series cleans up rswitch mdio support, and adds C22 operations. ==================== Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
2 parents 44d4962 + db48fe9 commit 4fefbc6

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2 files changed

+65
-52
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drivers/net/ethernet/renesas/rswitch.c

Lines changed: 52 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -1164,9 +1164,9 @@ static void rswitch_rmac_setting(struct rswitch_etha *etha, const u8 *mac)
11641164

11651165
static void rswitch_etha_enable_mii(struct rswitch_etha *etha)
11661166
{
1167-
rswitch_modify(etha->addr, MPIC, MPIC_PSMCS_MASK | MPIC_PSMHT_MASK,
1168-
MPIC_PSMCS(etha->psmcs) | MPIC_PSMHT(0x06));
1169-
rswitch_modify(etha->addr, MPSM, 0, MPSM_MFF_C45);
1167+
rswitch_modify(etha->addr, MPIC, MPIC_PSMCS | MPIC_PSMHT,
1168+
FIELD_PREP(MPIC_PSMCS, etha->psmcs) |
1169+
FIELD_PREP(MPIC_PSMHT, 0x06));
11701170
}
11711171

11721172
static int rswitch_etha_hw_init(struct rswitch_etha *etha, const u8 *mac)
@@ -1195,42 +1195,29 @@ static int rswitch_etha_hw_init(struct rswitch_etha *etha, const u8 *mac)
11951195
return rswitch_etha_change_mode(etha, EAMC_OPC_OPERATION);
11961196
}
11971197

1198-
static int rswitch_etha_set_access(struct rswitch_etha *etha, bool read,
1199-
int phyad, int devad, int regad, int data)
1198+
static int rswitch_etha_mpsm_op(struct rswitch_etha *etha, bool read,
1199+
unsigned int mmf, unsigned int pda,
1200+
unsigned int pra, unsigned int pop,
1201+
unsigned int prd)
12001202
{
1201-
int pop = read ? MDIO_READ_C45 : MDIO_WRITE_C45;
12021203
u32 val;
12031204
int ret;
12041205

1205-
if (devad == 0xffffffff)
1206-
return -ENODEV;
1207-
1208-
writel(MMIS1_CLEAR_FLAGS, etha->addr + MMIS1);
1206+
val = MPSM_PSME |
1207+
FIELD_PREP(MPSM_MFF, mmf) |
1208+
FIELD_PREP(MPSM_PDA, pda) |
1209+
FIELD_PREP(MPSM_PRA, pra) |
1210+
FIELD_PREP(MPSM_POP, pop) |
1211+
FIELD_PREP(MPSM_PRD, prd);
1212+
iowrite32(val, etha->addr + MPSM);
12091213

1210-
val = MPSM_PSME | MPSM_MFF_C45;
1211-
iowrite32((regad << 16) | (devad << 8) | (phyad << 3) | val, etha->addr + MPSM);
1212-
1213-
ret = rswitch_reg_wait(etha->addr, MMIS1, MMIS1_PAACS, MMIS1_PAACS);
1214+
ret = rswitch_reg_wait(etha->addr, MPSM, MPSM_PSME, 0);
12141215
if (ret)
12151216
return ret;
12161217

1217-
rswitch_modify(etha->addr, MMIS1, MMIS1_PAACS, MMIS1_PAACS);
1218-
12191218
if (read) {
1220-
writel((pop << 13) | (devad << 8) | (phyad << 3) | val, etha->addr + MPSM);
1221-
1222-
ret = rswitch_reg_wait(etha->addr, MMIS1, MMIS1_PRACS, MMIS1_PRACS);
1223-
if (ret)
1224-
return ret;
1225-
1226-
ret = (ioread32(etha->addr + MPSM) & MPSM_PRD_MASK) >> 16;
1227-
1228-
rswitch_modify(etha->addr, MMIS1, MMIS1_PRACS, MMIS1_PRACS);
1229-
} else {
1230-
iowrite32((data << 16) | (pop << 13) | (devad << 8) | (phyad << 3) | val,
1231-
etha->addr + MPSM);
1232-
1233-
ret = rswitch_reg_wait(etha->addr, MMIS1, MMIS1_PWACS, MMIS1_PWACS);
1219+
val = ioread32(etha->addr + MPSM);
1220+
ret = FIELD_GET(MPSM_PRD, val);
12341221
}
12351222

12361223
return ret;
@@ -1240,16 +1227,47 @@ static int rswitch_etha_mii_read_c45(struct mii_bus *bus, int addr, int devad,
12401227
int regad)
12411228
{
12421229
struct rswitch_etha *etha = bus->priv;
1230+
int ret;
12431231

1244-
return rswitch_etha_set_access(etha, true, addr, devad, regad, 0);
1232+
ret = rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,
1233+
MPSM_POP_ADDRESS, regad);
1234+
if (ret)
1235+
return ret;
1236+
1237+
return rswitch_etha_mpsm_op(etha, true, MPSM_MMF_C45, addr, devad,
1238+
MPSM_POP_READ_C45, 0);
12451239
}
12461240

12471241
static int rswitch_etha_mii_write_c45(struct mii_bus *bus, int addr, int devad,
12481242
int regad, u16 val)
12491243
{
12501244
struct rswitch_etha *etha = bus->priv;
1245+
int ret;
1246+
1247+
ret = rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,
1248+
MPSM_POP_ADDRESS, regad);
1249+
if (ret)
1250+
return ret;
1251+
1252+
return rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,
1253+
MPSM_POP_WRITE, val);
1254+
}
1255+
1256+
static int rswitch_etha_mii_read_c22(struct mii_bus *bus, int phyad, int regad)
1257+
{
1258+
struct rswitch_etha *etha = bus->priv;
1259+
1260+
return rswitch_etha_mpsm_op(etha, true, MPSM_MMF_C22, phyad, regad,
1261+
MPSM_POP_READ_C22, 0);
1262+
}
1263+
1264+
static int rswitch_etha_mii_write_c22(struct mii_bus *bus, int phyad,
1265+
int regad, u16 val)
1266+
{
1267+
struct rswitch_etha *etha = bus->priv;
12511268

1252-
return rswitch_etha_set_access(etha, false, addr, devad, regad, val);
1269+
return rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C22, phyad, regad,
1270+
MPSM_POP_WRITE, val);
12531271
}
12541272

12551273
/* Call of_node_put(port) after done */
@@ -1334,6 +1352,8 @@ static int rswitch_mii_register(struct rswitch_device *rdev)
13341352
mii_bus->priv = rdev->etha;
13351353
mii_bus->read_c45 = rswitch_etha_mii_read_c45;
13361354
mii_bus->write_c45 = rswitch_etha_mii_write_c45;
1355+
mii_bus->read = rswitch_etha_mii_read_c22;
1356+
mii_bus->write = rswitch_etha_mii_write_c22;
13371357
mii_bus->parent = &rdev->priv->pdev->dev;
13381358

13391359
mdio_np = of_get_child_by_name(rdev->np_port, "mdio");

drivers/net/ethernet/renesas/rswitch.h

Lines changed: 13 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -732,28 +732,21 @@ enum rswitch_etha_mode {
732732
#define MPIC_LSC_100M 1
733733
#define MPIC_LSC_1G 2
734734
#define MPIC_LSC_2_5G 3
735-
736-
#define MDIO_READ_C45 0x03
737-
#define MDIO_WRITE_C45 0x01
735+
#define MPIC_PSMCS GENMASK(22, 16)
736+
#define MPIC_PSMHT GENMASK(26, 24)
738737

739738
#define MPSM_PSME BIT(0)
740-
#define MPSM_MFF_C45 BIT(2)
741-
#define MPSM_PRD_SHIFT 16
742-
#define MPSM_PRD_MASK GENMASK(31, MPSM_PRD_SHIFT)
743-
744-
/* Completion flags */
745-
#define MMIS1_PAACS BIT(2) /* Address */
746-
#define MMIS1_PWACS BIT(1) /* Write */
747-
#define MMIS1_PRACS BIT(0) /* Read */
748-
#define MMIS1_CLEAR_FLAGS 0xf
749-
750-
#define MPIC_PSMCS_SHIFT 16
751-
#define MPIC_PSMCS_MASK GENMASK(22, MPIC_PSMCS_SHIFT)
752-
#define MPIC_PSMCS(val) ((val) << MPIC_PSMCS_SHIFT)
753-
754-
#define MPIC_PSMHT_SHIFT 24
755-
#define MPIC_PSMHT_MASK GENMASK(26, MPIC_PSMHT_SHIFT)
756-
#define MPIC_PSMHT(val) ((val) << MPIC_PSMHT_SHIFT)
739+
#define MPSM_MFF BIT(2)
740+
#define MPSM_MMF_C22 0
741+
#define MPSM_MMF_C45 1
742+
#define MPSM_PDA GENMASK(7, 3)
743+
#define MPSM_PRA GENMASK(12, 8)
744+
#define MPSM_POP GENMASK(14, 13)
745+
#define MPSM_POP_ADDRESS 0
746+
#define MPSM_POP_WRITE 1
747+
#define MPSM_POP_READ_C22 2
748+
#define MPSM_POP_READ_C45 3
749+
#define MPSM_PRD GENMASK(31, 16)
757750

758751
#define MLVC_PLV BIT(16)
759752

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