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selvintxavierrleon
selvintxavier
authored and
rleon
committed
RDMA/bnxt_re: Congestion control settings using debugfs hook
Implements routines to set and get different settings of the congestion control. This will enable the users to modify the settings according to their network. Currently supporting only GEN 0 version of the parameters. Reading these files queries the firmware and report the values currently programmed. Writing to the files sends commands that update the congestion control settings Signed-off-by: Selvin Xavier <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Leon Romanovsky <[email protected]>
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‎drivers/infiniband/hw/bnxt_re/bnxt_re.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -232,6 +232,8 @@ struct bnxt_re_dev {
232232
unsigned long event_bitmap;
233233
struct bnxt_qplib_cc_param cc_param;
234234
struct workqueue_struct *dcb_wq;
235+
struct dentry *cc_config;
236+
struct bnxt_re_dbg_cc_config_params *cc_config_params;
235237
};
236238

237239
#define to_bnxt_re_dev(ptr, member) \

‎drivers/infiniband/hw/bnxt_re/debugfs.c

Lines changed: 211 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,23 @@
2222

2323
static struct dentry *bnxt_re_debugfs_root;
2424

25+
static const char * const bnxt_re_cc_gen0_name[] = {
26+
"enable_cc",
27+
"run_avg_weight_g",
28+
"num_phase_per_state",
29+
"init_cr",
30+
"init_tr",
31+
"tos_ecn",
32+
"tos_dscp",
33+
"alt_vlan_pcp",
34+
"alt_vlan_dscp",
35+
"rtt",
36+
"cc_mode",
37+
"tcp_cp",
38+
"tx_queue",
39+
"inactivity_cp",
40+
};
41+
2542
static inline const char *bnxt_re_qp_state_str(u8 state)
2643
{
2744
switch (state) {
@@ -110,19 +127,212 @@ void bnxt_re_debug_rem_qpinfo(struct bnxt_re_dev *rdev, struct bnxt_re_qp *qp)
110127
debugfs_remove(qp->dentry);
111128
}
112129

130+
static int map_cc_config_offset_gen0_ext0(u32 offset, struct bnxt_qplib_cc_param *ccparam, u32 *val)
131+
{
132+
u64 map_offset;
133+
134+
map_offset = BIT(offset);
135+
136+
switch (map_offset) {
137+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_ENABLE_CC:
138+
*val = ccparam->enable;
139+
break;
140+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_G:
141+
*val = ccparam->g;
142+
break;
143+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_NUMPHASEPERSTATE:
144+
*val = ccparam->nph_per_state;
145+
break;
146+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_INIT_CR:
147+
*val = ccparam->init_cr;
148+
break;
149+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_INIT_TR:
150+
*val = ccparam->init_tr;
151+
break;
152+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TOS_ECN:
153+
*val = ccparam->tos_ecn;
154+
break;
155+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TOS_DSCP:
156+
*val = ccparam->tos_dscp;
157+
break;
158+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_ALT_VLAN_PCP:
159+
*val = ccparam->alt_vlan_pcp;
160+
break;
161+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_ALT_TOS_DSCP:
162+
*val = ccparam->alt_tos_dscp;
163+
break;
164+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_RTT:
165+
*val = ccparam->rtt;
166+
break;
167+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_CC_MODE:
168+
*val = ccparam->cc_mode;
169+
break;
170+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TCP_CP:
171+
*val = ccparam->tcp_cp;
172+
break;
173+
default:
174+
return -EINVAL;
175+
}
176+
177+
return 0;
178+
}
179+
180+
static ssize_t bnxt_re_cc_config_get(struct file *filp, char __user *buffer,
181+
size_t usr_buf_len, loff_t *ppos)
182+
{
183+
struct bnxt_re_cc_param *dbg_cc_param = filp->private_data;
184+
struct bnxt_re_dev *rdev = dbg_cc_param->rdev;
185+
struct bnxt_qplib_cc_param ccparam = {};
186+
u32 offset = dbg_cc_param->offset;
187+
char buf[16];
188+
u32 val;
189+
int rc;
190+
191+
rc = bnxt_qplib_query_cc_param(&rdev->qplib_res, &ccparam);
192+
if (rc)
193+
return rc;
194+
195+
rc = map_cc_config_offset_gen0_ext0(offset, &ccparam, &val);
196+
if (rc)
197+
return rc;
198+
199+
rc = snprintf(buf, sizeof(buf), "%d\n", val);
200+
if (rc < 0)
201+
return rc;
202+
203+
return simple_read_from_buffer(buffer, usr_buf_len, ppos, (u8 *)(buf), rc);
204+
}
205+
206+
static void bnxt_re_fill_gen0_ext0(struct bnxt_qplib_cc_param *ccparam, u32 offset, u32 val)
207+
{
208+
u32 modify_mask;
209+
210+
modify_mask = BIT(offset);
211+
212+
switch (modify_mask) {
213+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_ENABLE_CC:
214+
ccparam->enable = val;
215+
break;
216+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_G:
217+
ccparam->g = val;
218+
break;
219+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_NUMPHASEPERSTATE:
220+
ccparam->nph_per_state = val;
221+
break;
222+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_INIT_CR:
223+
ccparam->init_cr = val;
224+
break;
225+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_INIT_TR:
226+
ccparam->init_tr = val;
227+
break;
228+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TOS_ECN:
229+
ccparam->tos_ecn = val;
230+
break;
231+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TOS_DSCP:
232+
ccparam->tos_dscp = val;
233+
break;
234+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_ALT_VLAN_PCP:
235+
ccparam->alt_vlan_pcp = val;
236+
break;
237+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_ALT_TOS_DSCP:
238+
ccparam->alt_tos_dscp = val;
239+
break;
240+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_RTT:
241+
ccparam->rtt = val;
242+
break;
243+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_CC_MODE:
244+
ccparam->cc_mode = val;
245+
break;
246+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TCP_CP:
247+
ccparam->tcp_cp = val;
248+
break;
249+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TX_QUEUE:
250+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_INACTIVITY_CP:
251+
break;
252+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_TIME_PER_PHASE:
253+
ccparam->time_pph = val;
254+
break;
255+
case CMDQ_MODIFY_ROCE_CC_MODIFY_MASK_PKTS_PER_PHASE:
256+
ccparam->pkts_pph = val;
257+
break;
258+
}
259+
260+
ccparam->mask = modify_mask;
261+
}
262+
263+
static int bnxt_re_configure_cc(struct bnxt_re_dev *rdev, u32 gen_ext, u32 offset, u32 val)
264+
{
265+
struct bnxt_qplib_cc_param ccparam = { };
266+
267+
/* Supporting only Gen 0 now */
268+
if (gen_ext != CC_CONFIG_GEN0_EXT0)
269+
bnxt_re_fill_gen0_ext0(&ccparam, offset, val);
270+
else
271+
return -EINVAL;
272+
273+
bnxt_qplib_modify_cc(&rdev->qplib_res, &ccparam);
274+
return 0;
275+
}
276+
277+
static ssize_t bnxt_re_cc_config_set(struct file *filp, const char __user *buffer,
278+
size_t count, loff_t *ppos)
279+
{
280+
struct bnxt_re_cc_param *dbg_cc_param = filp->private_data;
281+
struct bnxt_re_dev *rdev = dbg_cc_param->rdev;
282+
u32 offset = dbg_cc_param->offset;
283+
u8 cc_gen = dbg_cc_param->cc_gen;
284+
char buf[16];
285+
u32 val;
286+
int rc;
287+
288+
if (copy_from_user(buf, buffer, count))
289+
return -EFAULT;
290+
291+
buf[count] = '\0';
292+
if (kstrtou32(buf, 0, &val))
293+
return -EINVAL;
294+
295+
rc = bnxt_re_configure_cc(rdev, cc_gen, offset, val);
296+
return rc ? rc : count;
297+
}
298+
299+
static const struct file_operations bnxt_re_cc_config_ops = {
300+
.owner = THIS_MODULE,
301+
.open = simple_open,
302+
.read = bnxt_re_cc_config_get,
303+
.write = bnxt_re_cc_config_set,
304+
};
305+
113306
void bnxt_re_debugfs_add_pdev(struct bnxt_re_dev *rdev)
114307
{
115308
struct pci_dev *pdev = rdev->en_dev->pdev;
309+
struct bnxt_re_dbg_cc_config_params *cc_params;
310+
int i;
116311

117312
rdev->dbg_root = debugfs_create_dir(dev_name(&pdev->dev), bnxt_re_debugfs_root);
118313

119314
rdev->qp_debugfs = debugfs_create_dir("QPs", rdev->dbg_root);
315+
rdev->cc_config = debugfs_create_dir("cc_config", rdev->dbg_root);
316+
317+
rdev->cc_config_params = kzalloc(sizeof(*cc_params), GFP_KERNEL);
318+
319+
for (i = 0; i < BNXT_RE_CC_PARAM_GEN0; i++) {
320+
struct bnxt_re_cc_param *tmp_params = &rdev->cc_config_params->gen0_parms[i];
321+
322+
tmp_params->rdev = rdev;
323+
tmp_params->offset = i;
324+
tmp_params->cc_gen = CC_CONFIG_GEN0_EXT0;
325+
tmp_params->dentry = debugfs_create_file(bnxt_re_cc_gen0_name[i], 0400,
326+
rdev->cc_config, tmp_params,
327+
&bnxt_re_cc_config_ops);
328+
}
120329
}
121330

122331
void bnxt_re_debugfs_rem_pdev(struct bnxt_re_dev *rdev)
123332
{
124333
debugfs_remove_recursive(rdev->qp_debugfs);
125-
334+
debugfs_remove_recursive(rdev->cc_config);
335+
kfree(rdev->cc_config_params);
126336
debugfs_remove_recursive(rdev->dbg_root);
127337
rdev->dbg_root = NULL;
128338
}

‎drivers/infiniband/hw/bnxt_re/debugfs.h

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,4 +18,19 @@ void bnxt_re_debugfs_rem_pdev(struct bnxt_re_dev *rdev);
1818
void bnxt_re_register_debugfs(void);
1919
void bnxt_re_unregister_debugfs(void);
2020

21+
#define CC_CONFIG_GEN_EXT(x, y) (((x) << 16) | (y))
22+
#define CC_CONFIG_GEN0_EXT0 CC_CONFIG_GEN_EXT(0, 0)
23+
24+
#define BNXT_RE_CC_PARAM_GEN0 14
25+
26+
struct bnxt_re_cc_param {
27+
struct bnxt_re_dev *rdev;
28+
struct dentry *dentry;
29+
u32 offset;
30+
u8 cc_gen;
31+
};
32+
33+
struct bnxt_re_dbg_cc_config_params {
34+
struct bnxt_re_cc_param gen0_parms[BNXT_RE_CC_PARAM_GEN0];
35+
};
2136
#endif

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