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RISC-V: KVM: Implement VCPU create, init and destroy functions
This patch implements VCPU create, init and destroy functions required by generic KVM module. We don't have much dynamic resources in struct kvm_vcpu_arch so these functions are quite simple for KVM RISC-V. Signed-off-by: Anup Patel <[email protected]> Acked-by: Paolo Bonzini <[email protected]> Reviewed-by: Paolo Bonzini <[email protected]> Reviewed-by: Alexander Graf <[email protected]> Acked-by: Palmer Dabbelt <[email protected]>
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2 files changed

+115
-9
lines changed

2 files changed

+115
-9
lines changed

arch/riscv/include/asm/kvm_host.h

Lines changed: 69 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,76 @@ struct kvm_cpu_trap {
5757
unsigned long htinst;
5858
};
5959

60+
struct kvm_cpu_context {
61+
unsigned long zero;
62+
unsigned long ra;
63+
unsigned long sp;
64+
unsigned long gp;
65+
unsigned long tp;
66+
unsigned long t0;
67+
unsigned long t1;
68+
unsigned long t2;
69+
unsigned long s0;
70+
unsigned long s1;
71+
unsigned long a0;
72+
unsigned long a1;
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unsigned long a2;
74+
unsigned long a3;
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unsigned long a4;
76+
unsigned long a5;
77+
unsigned long a6;
78+
unsigned long a7;
79+
unsigned long s2;
80+
unsigned long s3;
81+
unsigned long s4;
82+
unsigned long s5;
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unsigned long s6;
84+
unsigned long s7;
85+
unsigned long s8;
86+
unsigned long s9;
87+
unsigned long s10;
88+
unsigned long s11;
89+
unsigned long t3;
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unsigned long t4;
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unsigned long t5;
92+
unsigned long t6;
93+
unsigned long sepc;
94+
unsigned long sstatus;
95+
unsigned long hstatus;
96+
};
97+
98+
struct kvm_vcpu_csr {
99+
unsigned long vsstatus;
100+
unsigned long vsie;
101+
unsigned long vstvec;
102+
unsigned long vsscratch;
103+
unsigned long vsepc;
104+
unsigned long vscause;
105+
unsigned long vstval;
106+
unsigned long hvip;
107+
unsigned long vsatp;
108+
unsigned long scounteren;
109+
};
110+
60111
struct kvm_vcpu_arch {
112+
/* VCPU ran at least once */
113+
bool ran_atleast_once;
114+
115+
/* ISA feature bits (similar to MISA) */
116+
unsigned long isa;
117+
118+
/* CPU context of Guest VCPU */
119+
struct kvm_cpu_context guest_context;
120+
121+
/* CPU CSR context of Guest VCPU */
122+
struct kvm_vcpu_csr guest_csr;
123+
124+
/* CPU context upon Guest VCPU reset */
125+
struct kvm_cpu_context guest_reset_context;
126+
127+
/* CPU CSR context upon Guest VCPU reset */
128+
struct kvm_vcpu_csr guest_reset_csr;
129+
61130
/* Don't run the VCPU (blocked) */
62131
bool pause;
63132

arch/riscv/kvm/vcpu.c

Lines changed: 46 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -38,30 +38,64 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
3838
sizeof(kvm_vcpu_stats_desc),
3939
};
4040

41+
#define KVM_RISCV_ISA_ALLOWED (riscv_isa_extension_mask(a) | \
42+
riscv_isa_extension_mask(c) | \
43+
riscv_isa_extension_mask(d) | \
44+
riscv_isa_extension_mask(f) | \
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riscv_isa_extension_mask(i) | \
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riscv_isa_extension_mask(m) | \
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riscv_isa_extension_mask(s) | \
48+
riscv_isa_extension_mask(u))
49+
50+
static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
51+
{
52+
struct kvm_vcpu_csr *csr = &vcpu->arch.guest_csr;
53+
struct kvm_vcpu_csr *reset_csr = &vcpu->arch.guest_reset_csr;
54+
struct kvm_cpu_context *cntx = &vcpu->arch.guest_context;
55+
struct kvm_cpu_context *reset_cntx = &vcpu->arch.guest_reset_context;
56+
57+
memcpy(csr, reset_csr, sizeof(*csr));
58+
59+
memcpy(cntx, reset_cntx, sizeof(*cntx));
60+
}
61+
4162
int kvm_arch_vcpu_precreate(struct kvm *kvm, unsigned int id)
4263
{
4364
return 0;
4465
}
4566

4667
int kvm_arch_vcpu_create(struct kvm_vcpu *vcpu)
4768
{
48-
/* TODO: */
69+
struct kvm_cpu_context *cntx;
70+
71+
/* Mark this VCPU never ran */
72+
vcpu->arch.ran_atleast_once = false;
73+
74+
/* Setup ISA features available to VCPU */
75+
vcpu->arch.isa = riscv_isa_extension_base(NULL) & KVM_RISCV_ISA_ALLOWED;
76+
77+
/* Setup reset state of shadow SSTATUS and HSTATUS CSRs */
78+
cntx = &vcpu->arch.guest_reset_context;
79+
cntx->sstatus = SR_SPP | SR_SPIE;
80+
cntx->hstatus = 0;
81+
cntx->hstatus |= HSTATUS_VTW;
82+
cntx->hstatus |= HSTATUS_SPVP;
83+
cntx->hstatus |= HSTATUS_SPV;
84+
85+
/* Reset VCPU */
86+
kvm_riscv_reset_vcpu(vcpu);
87+
4988
return 0;
5089
}
5190

5291
void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
5392
{
5493
}
5594

56-
int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
57-
{
58-
/* TODO: */
59-
return 0;
60-
}
61-
6295
void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6396
{
64-
/* TODO: */
97+
/* Flush the pages pre-allocated for Stage2 page table mappings */
98+
kvm_riscv_stage2_flush_cache(vcpu);
6599
}
66100

67101
int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu)
@@ -197,6 +231,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
197231
struct kvm_cpu_trap trap;
198232
struct kvm_run *run = vcpu->run;
199233

234+
/* Mark this VCPU ran at least once */
235+
vcpu->arch.ran_atleast_once = true;
236+
200237
vcpu->arch.srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
201238

202239
/* Process MMIO value returned from user-space */
@@ -270,7 +307,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu)
270307
* get an interrupt between __kvm_riscv_switch_to() and
271308
* local_irq_enable() which can potentially change CSRs.
272309
*/
273-
trap.sepc = 0;
310+
trap.sepc = vcpu->arch.guest_context.sepc;
274311
trap.scause = csr_read(CSR_SCAUSE);
275312
trap.stval = csr_read(CSR_STVAL);
276313
trap.htval = csr_read(CSR_HTVAL);

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