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drm/i915/gvt: Wean gvt off using dev_priv
Teach gvt to use intel_gt directly as it currently assumes direct HW access. [Zhenyu: rebase, fix compiling] Cc: Ding Zhuocheng <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Acked-by: Zhenyu Wang <[email protected]> Signed-off-by: Zhenyu Wang <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
1 parent 8fde410 commit a61ac1e

20 files changed

+239
-238
lines changed

‎drivers/gpu/drm/i915/gvt/aperture_gm.c

Lines changed: 44 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@
4141
static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
4242
{
4343
struct intel_gvt *gvt = vgpu->gvt;
44-
struct drm_i915_private *dev_priv = gvt->dev_priv;
44+
struct intel_gt *gt = gvt->gt;
4545
unsigned int flags;
4646
u64 start, end, size;
4747
struct drm_mm_node *node;
@@ -61,14 +61,14 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
6161
flags = PIN_MAPPABLE;
6262
}
6363

64-
mutex_lock(&dev_priv->ggtt.vm.mutex);
65-
mmio_hw_access_pre(dev_priv);
66-
ret = i915_gem_gtt_insert(&dev_priv->ggtt.vm, node,
64+
mutex_lock(&gt->ggtt->vm.mutex);
65+
mmio_hw_access_pre(gt);
66+
ret = i915_gem_gtt_insert(&gt->ggtt->vm, node,
6767
size, I915_GTT_PAGE_SIZE,
6868
I915_COLOR_UNEVICTABLE,
6969
start, end, flags);
70-
mmio_hw_access_post(dev_priv);
71-
mutex_unlock(&dev_priv->ggtt.vm.mutex);
70+
mmio_hw_access_post(gt);
71+
mutex_unlock(&gt->ggtt->vm.mutex);
7272
if (ret)
7373
gvt_err("fail to alloc %s gm space from host\n",
7474
high_gm ? "high" : "low");
@@ -79,7 +79,7 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
7979
static int alloc_vgpu_gm(struct intel_vgpu *vgpu)
8080
{
8181
struct intel_gvt *gvt = vgpu->gvt;
82-
struct drm_i915_private *dev_priv = gvt->dev_priv;
82+
struct intel_gt *gt = gvt->gt;
8383
int ret;
8484

8585
ret = alloc_gm(vgpu, false);
@@ -98,20 +98,21 @@ static int alloc_vgpu_gm(struct intel_vgpu *vgpu)
9898

9999
return 0;
100100
out_free_aperture:
101-
mutex_lock(&dev_priv->ggtt.vm.mutex);
101+
mutex_lock(&gt->ggtt->vm.mutex);
102102
drm_mm_remove_node(&vgpu->gm.low_gm_node);
103-
mutex_unlock(&dev_priv->ggtt.vm.mutex);
103+
mutex_unlock(&gt->ggtt->vm.mutex);
104104
return ret;
105105
}
106106

107107
static void free_vgpu_gm(struct intel_vgpu *vgpu)
108108
{
109-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
109+
struct intel_gvt *gvt = vgpu->gvt;
110+
struct intel_gt *gt = gvt->gt;
110111

111-
mutex_lock(&dev_priv->ggtt.vm.mutex);
112+
mutex_lock(&gt->ggtt->vm.mutex);
112113
drm_mm_remove_node(&vgpu->gm.low_gm_node);
113114
drm_mm_remove_node(&vgpu->gm.high_gm_node);
114-
mutex_unlock(&dev_priv->ggtt.vm.mutex);
115+
mutex_unlock(&gt->ggtt->vm.mutex);
115116
}
116117

117118
/**
@@ -128,28 +129,29 @@ void intel_vgpu_write_fence(struct intel_vgpu *vgpu,
128129
u32 fence, u64 value)
129130
{
130131
struct intel_gvt *gvt = vgpu->gvt;
131-
struct drm_i915_private *dev_priv = gvt->dev_priv;
132+
struct drm_i915_private *i915 = gvt->gt->i915;
133+
struct intel_uncore *uncore = gvt->gt->uncore;
132134
struct i915_fence_reg *reg;
133135
i915_reg_t fence_reg_lo, fence_reg_hi;
134136

135-
assert_rpm_wakelock_held(&dev_priv->runtime_pm);
137+
assert_rpm_wakelock_held(uncore->rpm);
136138

137-
if (drm_WARN_ON(&dev_priv->drm, fence >= vgpu_fence_sz(vgpu)))
139+
if (drm_WARN_ON(&i915->drm, fence >= vgpu_fence_sz(vgpu)))
138140
return;
139141

140142
reg = vgpu->fence.regs[fence];
141-
if (drm_WARN_ON(&dev_priv->drm, !reg))
143+
if (drm_WARN_ON(&i915->drm, !reg))
142144
return;
143145

144146
fence_reg_lo = FENCE_REG_GEN6_LO(reg->id);
145147
fence_reg_hi = FENCE_REG_GEN6_HI(reg->id);
146148

147-
I915_WRITE(fence_reg_lo, 0);
148-
POSTING_READ(fence_reg_lo);
149+
intel_uncore_write(uncore, fence_reg_lo, 0);
150+
intel_uncore_posting_read(uncore, fence_reg_lo);
149151

150-
I915_WRITE(fence_reg_hi, upper_32_bits(value));
151-
I915_WRITE(fence_reg_lo, lower_32_bits(value));
152-
POSTING_READ(fence_reg_lo);
152+
intel_uncore_write(uncore, fence_reg_hi, upper_32_bits(value));
153+
intel_uncore_write(uncore, fence_reg_lo, lower_32_bits(value));
154+
intel_uncore_posting_read(uncore, fence_reg_lo);
153155
}
154156

155157
static void _clear_vgpu_fence(struct intel_vgpu *vgpu)
@@ -163,42 +165,43 @@ static void _clear_vgpu_fence(struct intel_vgpu *vgpu)
163165
static void free_vgpu_fence(struct intel_vgpu *vgpu)
164166
{
165167
struct intel_gvt *gvt = vgpu->gvt;
166-
struct drm_i915_private *dev_priv = gvt->dev_priv;
168+
struct intel_uncore *uncore = gvt->gt->uncore;
167169
struct i915_fence_reg *reg;
170+
intel_wakeref_t wakeref;
168171
u32 i;
169172

170-
if (drm_WARN_ON(&dev_priv->drm, !vgpu_fence_sz(vgpu)))
173+
if (drm_WARN_ON(&gvt->gt->i915->drm, !vgpu_fence_sz(vgpu)))
171174
return;
172175

173-
intel_runtime_pm_get(&dev_priv->runtime_pm);
176+
wakeref = intel_runtime_pm_get(uncore->rpm);
174177

175-
mutex_lock(&dev_priv->ggtt.vm.mutex);
178+
mutex_lock(&gvt->gt->ggtt->vm.mutex);
176179
_clear_vgpu_fence(vgpu);
177180
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
178181
reg = vgpu->fence.regs[i];
179182
i915_unreserve_fence(reg);
180183
vgpu->fence.regs[i] = NULL;
181184
}
182-
mutex_unlock(&dev_priv->ggtt.vm.mutex);
185+
mutex_unlock(&gvt->gt->ggtt->vm.mutex);
183186

184-
intel_runtime_pm_put_unchecked(&dev_priv->runtime_pm);
187+
intel_runtime_pm_put(uncore->rpm, wakeref);
185188
}
186189

187190
static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
188191
{
189192
struct intel_gvt *gvt = vgpu->gvt;
190-
struct drm_i915_private *dev_priv = gvt->dev_priv;
191-
struct intel_runtime_pm *rpm = &dev_priv->runtime_pm;
193+
struct intel_uncore *uncore = gvt->gt->uncore;
192194
struct i915_fence_reg *reg;
195+
intel_wakeref_t wakeref;
193196
int i;
194197

195-
intel_runtime_pm_get(rpm);
198+
wakeref = intel_runtime_pm_get(uncore->rpm);
196199

197200
/* Request fences from host */
198-
mutex_lock(&dev_priv->ggtt.vm.mutex);
201+
mutex_lock(&gvt->gt->ggtt->vm.mutex);
199202

200203
for (i = 0; i < vgpu_fence_sz(vgpu); i++) {
201-
reg = i915_reserve_fence(&dev_priv->ggtt);
204+
reg = i915_reserve_fence(gvt->gt->ggtt);
202205
if (IS_ERR(reg))
203206
goto out_free_fence;
204207

@@ -207,9 +210,10 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
207210

208211
_clear_vgpu_fence(vgpu);
209212

210-
mutex_unlock(&dev_priv->ggtt.vm.mutex);
211-
intel_runtime_pm_put_unchecked(rpm);
213+
mutex_unlock(&gvt->gt->ggtt->vm.mutex);
214+
intel_runtime_pm_put(uncore->rpm, wakeref);
212215
return 0;
216+
213217
out_free_fence:
214218
gvt_vgpu_err("Failed to alloc fences\n");
215219
/* Return fences to host, if fail */
@@ -220,8 +224,8 @@ static int alloc_vgpu_fence(struct intel_vgpu *vgpu)
220224
i915_unreserve_fence(reg);
221225
vgpu->fence.regs[i] = NULL;
222226
}
223-
mutex_unlock(&dev_priv->ggtt.vm.mutex);
224-
intel_runtime_pm_put_unchecked(rpm);
227+
mutex_unlock(&gvt->gt->ggtt->vm.mutex);
228+
intel_runtime_pm_put_unchecked(uncore->rpm);
225229
return -ENOSPC;
226230
}
227231

@@ -315,11 +319,11 @@ void intel_vgpu_free_resource(struct intel_vgpu *vgpu)
315319
*/
316320
void intel_vgpu_reset_resource(struct intel_vgpu *vgpu)
317321
{
318-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
322+
struct intel_gvt *gvt = vgpu->gvt;
323+
intel_wakeref_t wakeref;
319324

320-
intel_runtime_pm_get(&dev_priv->runtime_pm);
321-
_clear_vgpu_fence(vgpu);
322-
intel_runtime_pm_put_unchecked(&dev_priv->runtime_pm);
325+
with_intel_runtime_pm(gvt->gt->uncore->rpm, wakeref)
326+
_clear_vgpu_fence(vgpu);
323327
}
324328

325329
/**

‎drivers/gpu/drm/i915/gvt/cfg_space.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -106,7 +106,7 @@ static void vgpu_pci_cfg_mem_write(struct intel_vgpu *vgpu, unsigned int off,
106106
int intel_vgpu_emulate_cfg_read(struct intel_vgpu *vgpu, unsigned int offset,
107107
void *p_data, unsigned int bytes)
108108
{
109-
struct drm_i915_private *i915 = vgpu->gvt->dev_priv;
109+
struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
110110

111111
if (drm_WARN_ON(&i915->drm, bytes > 4))
112112
return -EINVAL;
@@ -300,7 +300,7 @@ static int emulate_pci_bar_write(struct intel_vgpu *vgpu, unsigned int offset,
300300
int intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset,
301301
void *p_data, unsigned int bytes)
302302
{
303-
struct drm_i915_private *i915 = vgpu->gvt->dev_priv;
303+
struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
304304
int ret;
305305

306306
if (drm_WARN_ON(&i915->drm, bytes > 4))
@@ -396,9 +396,9 @@ void intel_vgpu_init_cfg_space(struct intel_vgpu *vgpu,
396396
memset(vgpu_cfg_space(vgpu) + INTEL_GVT_PCI_OPREGION, 0, 4);
397397

398398
vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_GTTMMIO].size =
399-
pci_resource_len(gvt->dev_priv->drm.pdev, 0);
399+
pci_resource_len(gvt->gt->i915->drm.pdev, 0);
400400
vgpu->cfg_space.bar[INTEL_GVT_PCI_BAR_APERTURE].size =
401-
pci_resource_len(gvt->dev_priv->drm.pdev, 2);
401+
pci_resource_len(gvt->gt->i915->drm.pdev, 2);
402402

403403
memset(vgpu_cfg_space(vgpu) + PCI_ROM_ADDRESS, 0, 4);
404404
}

‎drivers/gpu/drm/i915/gvt/debugfs.c

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -58,12 +58,11 @@ static int mmio_offset_compare(void *priv,
5858
static inline int mmio_diff_handler(struct intel_gvt *gvt,
5959
u32 offset, void *data)
6060
{
61-
struct drm_i915_private *i915 = gvt->dev_priv;
6261
struct mmio_diff_param *param = data;
6362
struct diff_mmio *node;
6463
u32 preg, vreg;
6564

66-
preg = intel_uncore_read_notrace(&i915->uncore, _MMIO(offset));
65+
preg = intel_uncore_read_notrace(gvt->gt->uncore, _MMIO(offset));
6766
vreg = vgpu_vreg(param->vgpu, offset);
6867

6968
if (preg != vreg) {
@@ -98,10 +97,10 @@ static int vgpu_mmio_diff_show(struct seq_file *s, void *unused)
9897
mutex_lock(&gvt->lock);
9998
spin_lock_bh(&gvt->scheduler.mmio_context_lock);
10099

101-
mmio_hw_access_pre(gvt->dev_priv);
100+
mmio_hw_access_pre(gvt->gt);
102101
/* Recognize all the diff mmios to list. */
103102
intel_gvt_for_each_tracked_mmio(gvt, mmio_diff_handler, &param);
104-
mmio_hw_access_post(gvt->dev_priv);
103+
mmio_hw_access_post(gvt->gt);
105104

106105
spin_unlock_bh(&gvt->scheduler.mmio_context_lock);
107106
mutex_unlock(&gvt->lock);
@@ -186,7 +185,7 @@ void intel_gvt_debugfs_remove_vgpu(struct intel_vgpu *vgpu)
186185
*/
187186
void intel_gvt_debugfs_init(struct intel_gvt *gvt)
188187
{
189-
struct drm_minor *minor = gvt->dev_priv->drm.primary;
188+
struct drm_minor *minor = gvt->gt->i915->drm.primary;
190189

191190
gvt->debugfs_root = debugfs_create_dir("gvt", minor->debugfs_root);
192191

‎drivers/gpu/drm/i915/gvt/display.c

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@ static int get_edp_pipe(struct intel_vgpu *vgpu)
5757

5858
static int edp_pipe_is_enabled(struct intel_vgpu *vgpu)
5959
{
60-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
60+
struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
6161

6262
if (!(vgpu_vreg_t(vgpu, PIPECONF(_PIPE_EDP)) & PIPECONF_ENABLE))
6363
return 0;
@@ -69,7 +69,7 @@ static int edp_pipe_is_enabled(struct intel_vgpu *vgpu)
6969

7070
int pipe_is_enabled(struct intel_vgpu *vgpu, int pipe)
7171
{
72-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
72+
struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
7373

7474
if (drm_WARN_ON(&dev_priv->drm,
7575
pipe < PIPE_A || pipe >= I915_MAX_PIPES))
@@ -169,7 +169,7 @@ static u8 dpcd_fix_data[DPCD_HEADER_SIZE] = {
169169

170170
static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
171171
{
172-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
172+
struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
173173
int pipe;
174174

175175
if (IS_BROXTON(dev_priv)) {
@@ -320,7 +320,7 @@ static void clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num)
320320
static int setup_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num,
321321
int type, unsigned int resolution)
322322
{
323-
struct drm_i915_private *i915 = vgpu->gvt->dev_priv;
323+
struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
324324
struct intel_vgpu_port *port = intel_vgpu_port(vgpu, port_num);
325325

326326
if (drm_WARN_ON(&i915->drm, resolution >= GVT_EDID_NUM))
@@ -391,7 +391,7 @@ void intel_gvt_check_vblank_emulation(struct intel_gvt *gvt)
391391

392392
static void emulate_vblank_on_pipe(struct intel_vgpu *vgpu, int pipe)
393393
{
394-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
394+
struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
395395
struct intel_vgpu_irq *irq = &vgpu->irq;
396396
int vblank_event[] = {
397397
[PIPE_A] = PIPE_A_VBLANK,
@@ -423,7 +423,7 @@ static void emulate_vblank(struct intel_vgpu *vgpu)
423423
int pipe;
424424

425425
mutex_lock(&vgpu->vgpu_lock);
426-
for_each_pipe(vgpu->gvt->dev_priv, pipe)
426+
for_each_pipe(vgpu->gvt->gt->i915, pipe)
427427
emulate_vblank_on_pipe(vgpu, pipe);
428428
mutex_unlock(&vgpu->vgpu_lock);
429429
}
@@ -456,11 +456,11 @@ void intel_gvt_emulate_vblank(struct intel_gvt *gvt)
456456
*/
457457
void intel_vgpu_emulate_hotplug(struct intel_vgpu *vgpu, bool connected)
458458
{
459-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
459+
struct drm_i915_private *i915 = vgpu->gvt->gt->i915;
460460

461461
/* TODO: add more platforms support */
462-
if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv) ||
463-
IS_COFFEELAKE(dev_priv)) {
462+
if (IS_SKYLAKE(i915) || IS_KABYLAKE(i915) ||
463+
IS_COFFEELAKE(i915)) {
464464
if (connected) {
465465
vgpu_vreg_t(vgpu, SFUSE_STRAP) |=
466466
SFUSE_STRAP_DDID_DETECTED;
@@ -486,7 +486,7 @@ void intel_vgpu_emulate_hotplug(struct intel_vgpu *vgpu, bool connected)
486486
*/
487487
void intel_vgpu_clean_display(struct intel_vgpu *vgpu)
488488
{
489-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
489+
struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
490490

491491
if (IS_SKYLAKE(dev_priv) || IS_KABYLAKE(dev_priv) ||
492492
IS_COFFEELAKE(dev_priv))
@@ -508,7 +508,7 @@ void intel_vgpu_clean_display(struct intel_vgpu *vgpu)
508508
*/
509509
int intel_vgpu_init_display(struct intel_vgpu *vgpu, u64 resolution)
510510
{
511-
struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
511+
struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
512512

513513
intel_vgpu_init_i2c_edid(vgpu);
514514

‎drivers/gpu/drm/i915/gvt/dmabuf.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -417,7 +417,7 @@ static void update_fb_info(struct vfio_device_gfx_plane_info *gvt_dmabuf,
417417

418418
int intel_vgpu_query_plane(struct intel_vgpu *vgpu, void *args)
419419
{
420-
struct drm_device *dev = &vgpu->gvt->dev_priv->drm;
420+
struct drm_device *dev = &vgpu->gvt->gt->i915->drm;
421421
struct vfio_device_gfx_plane_info *gfx_plane_info = args;
422422
struct intel_vgpu_dmabuf_obj *dmabuf_obj;
423423
struct intel_vgpu_fb_info fb_info;
@@ -523,7 +523,7 @@ int intel_vgpu_query_plane(struct intel_vgpu *vgpu, void *args)
523523
/* To associate an exposed dmabuf with the dmabuf_obj */
524524
int intel_vgpu_get_dmabuf(struct intel_vgpu *vgpu, unsigned int dmabuf_id)
525525
{
526-
struct drm_device *dev = &vgpu->gvt->dev_priv->drm;
526+
struct drm_device *dev = &vgpu->gvt->gt->i915->drm;
527527
struct intel_vgpu_dmabuf_obj *dmabuf_obj;
528528
struct drm_i915_gem_object *obj;
529529
struct dma_buf *dmabuf;

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