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Abhishek ChauhanPaolo Abeni
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net: stmmac: Programming sequence for VLAN packets with split header
Currently reset state configuration of split header works fine for non-tagged packets and we see no corruption in payload of any size We need additional programming sequence with reset configuration to handle VLAN tagged packets to avoid corruption in payload for packets of size greater than 256 bytes. Without this change ping application complains about corruption in payload when the size of the VLAN packet exceeds 256 bytes. With this change tagged and non-tagged packets of any size works fine and there is no corruption seen. Current configuration which has the issue for VLAN packet ---------------------------------------------------------- Split happens at the position at Layer 3 header |MAC-DA|MAC-SA|Vlan Tag|Ether type|IP header|IP data|Rest of the payload| 2 bytes ^ | With the fix we are making sure that the split happens now at Layer 2 which is end of ethernet header and start of IP payload Ip traffic split ----------------- Bits which take care of this are SPLM and SPLOFST SPLM = Split mode is set to Layer 2 SPLOFST = These bits indicate the value of offset from the beginning of Length/Type field at which header split should take place when the appropriate SPLM is selected. Reset value is 2bytes. Un-tagged data (without VLAN) |MAC-DA|MAC-SA|Ether type|IP header|IP data|Rest of the payload| 2bytes ^ | Tagged data (with VLAN) |MAC-DA|MAC-SA|VLAN Tag|Ether type|IP header|IP data|Rest of the payload| 2bytes ^ | Non-IP traffic split such AV packet ------------------------------------ Bits which take care of this are SAVE = Split AV Enable SAVO = Split AV Offset, similar to SPLOFST but this is for AVTP packets. |Preamble|MAC-DA|MAC-SA|VLAN tag|Ether type|IEEE 1722 payload|CRC| 2bytes ^ | Signed-off-by: Abhishek Chauhan <[email protected]> Reviewed-by: Simon Horman <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Paolo Abeni <[email protected]>
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drivers/net/ethernet/stmicro/stmmac/dwmac4.h

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@@ -44,6 +44,7 @@
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#define GMAC_MDIO_DATA 0x00000204
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#define GMAC_GPIO_STATUS 0x0000020C
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#define GMAC_ARP_ADDR 0x00000210
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#define GMAC_EXT_CFG1 0x00000238
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#define GMAC_ADDR_HIGH(reg) (0x300 + reg * 8)
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#define GMAC_ADDR_LOW(reg) (0x304 + reg * 8)
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#define GMAC_L3L4_CTRL(reg) (0x900 + (reg) * 0x30)
@@ -284,6 +285,10 @@ enum power_event {
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#define GMAC_HW_FEAT_DVLAN BIT(5)
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#define GMAC_HW_FEAT_NRVF GENMASK(2, 0)
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/* MAC extended config 1 */
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#define GMAC_CONFIG1_SAVE_EN BIT(24)
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#define GMAC_CONFIG1_SPLM(v) FIELD_PREP(GENMASK(9, 8), v)
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/* GMAC GPIO Status reg */
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#define GMAC_GPO0 BIT(16)
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#define GMAC_GPO1 BIT(17)

drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c

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@@ -526,6 +526,11 @@ static void dwmac4_enable_sph(struct stmmac_priv *priv, void __iomem *ioaddr,
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value |= GMAC_CONFIG_HDSMS_256; /* Segment max 256 bytes */
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writel(value, ioaddr + GMAC_EXT_CONFIG);
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value = readl(ioaddr + GMAC_EXT_CFG1);
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value |= GMAC_CONFIG1_SPLM(1); /* Split mode set to L2OFST */
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value |= GMAC_CONFIG1_SAVE_EN; /* Enable Split AV mode */
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writel(value, ioaddr + GMAC_EXT_CFG1);
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value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan));
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if (en)
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value |= DMA_CONTROL_SPH;

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