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torvaldstorvalds
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Merge tag 'phy-fixes-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy fixes from Vinod Koul: - Qualcomm QMP driver fixes for null deref on suspend, bogus supplies fix and reset entries fix - BCM usb driver init array fix - cadence array offset fix - starfive link configuration fix - config dependency fix for rockchip driver - freescale reset signal fix before pll lock - tegra driver fix for error pointer check * tag 'phy-fixes-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: phy: tegra: xusb: Add error pointer check in xusb.c dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Fix X1E80100 resets entries phy: freescale: imx8m-pcie: Do CMN_RST just before PHY PLL lock check phy: phy-rockchip-samsung-hdptx: Depend on CONFIG_COMMON_CLK phy: ti: phy-j721e-wiz: fix usxgmii configuration phy: starfive: jh7110-usb: Fix link configuration to controller phy: qcom: qmp-pcie: drop bogus x1e80100 qref supplies phy: qcom: qmp-combo: move driver data initialisation earlier phy: qcom: qmp-usbc: fix NULL-deref on runtime suspend phy: qcom: qmp-usb-legacy: fix NULL-deref on runtime suspend phy: qcom: qmp-usb: fix NULL-deref on runtime suspend dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: add missing x1e80100 pipediv2 clocks phy: usb: disable COMMONONN for dual mode phy: cadence: Sierra: Fix offset of DEQ open eye algorithm control register phy: usb: Fix missing elements in BCM4908 USB init array
2 parents e8529dc + e70d267 commit d5aaa0b

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14 files changed

+59
-28
lines changed

14 files changed

+59
-28
lines changed

‎Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -154,8 +154,6 @@ allOf:
154154
- qcom,sm8550-qmp-gen4x2-pcie-phy
155155
- qcom,sm8650-qmp-gen3x2-pcie-phy
156156
- qcom,sm8650-qmp-gen4x2-pcie-phy
157-
- qcom,x1e80100-qmp-gen3x2-pcie-phy
158-
- qcom,x1e80100-qmp-gen4x2-pcie-phy
159157
then:
160158
properties:
161159
clocks:
@@ -171,6 +169,8 @@ allOf:
171169
- qcom,sc8280xp-qmp-gen3x1-pcie-phy
172170
- qcom,sc8280xp-qmp-gen3x2-pcie-phy
173171
- qcom,sc8280xp-qmp-gen3x4-pcie-phy
172+
- qcom,x1e80100-qmp-gen3x2-pcie-phy
173+
- qcom,x1e80100-qmp-gen4x2-pcie-phy
174174
- qcom,x1e80100-qmp-gen4x4-pcie-phy
175175
then:
176176
properties:
@@ -201,6 +201,7 @@ allOf:
201201
- qcom,sm8550-qmp-gen4x2-pcie-phy
202202
- qcom,sm8650-qmp-gen4x2-pcie-phy
203203
- qcom,x1e80100-qmp-gen4x2-pcie-phy
204+
- qcom,x1e80100-qmp-gen4x4-pcie-phy
204205
then:
205206
properties:
206207
resets:

‎drivers/phy/broadcom/phy-brcm-usb-init-synopsys.c

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -153,7 +153,9 @@ static void xhci_soft_reset(struct brcm_usb_init_params *params,
153153
} else {
154154
USB_CTRL_SET(ctrl, USB_PM, XHC_SOFT_RESETB);
155155
/* Required for COMMONONN to be set */
156-
USB_XHCI_GBL_UNSET(xhci_gbl, GUSB2PHYCFG, U2_FREECLK_EXISTS);
156+
if (params->supported_port_modes != USB_CTLR_MODE_DRD)
157+
USB_XHCI_GBL_UNSET(xhci_gbl, GUSB2PHYCFG,
158+
U2_FREECLK_EXISTS);
157159
}
158160
}
159161

@@ -328,8 +330,12 @@ static void usb_init_common_7216(struct brcm_usb_init_params *params)
328330
/* 1 millisecond - for USB clocks to settle down */
329331
usleep_range(1000, 2000);
330332

331-
/* Disable PHY when port is suspended */
332-
USB_CTRL_SET(ctrl, P0_U2PHY_CFG1, COMMONONN);
333+
/*
334+
* Disable PHY when port is suspended
335+
* Does not work in DRD mode
336+
*/
337+
if (params->supported_port_modes != USB_CTLR_MODE_DRD)
338+
USB_CTRL_SET(ctrl, P0_U2PHY_CFG1, COMMONONN);
333339

334340
usb_wake_enable_7216(params, false);
335341
usb_init_common(params);

‎drivers/phy/broadcom/phy-brcm-usb-init.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -220,6 +220,8 @@ usb_reg_bits_map_table[BRCM_FAMILY_COUNT][USB_CTRL_SELECTOR_COUNT] = {
220220
0, /* USB_CTRL_SETUP_SCB2_EN_MASK */
221221
0, /* USB_CTRL_SETUP_SS_EHCI64BIT_EN_MASK */
222222
0, /* USB_CTRL_SETUP_STRAP_IPP_SEL_MASK */
223+
0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT0_MASK */
224+
0, /* USB_CTRL_SETUP_OC3_DISABLE_PORT1_MASK */
223225
0, /* USB_CTRL_SETUP_OC3_DISABLE_MASK */
224226
0, /* USB_CTRL_PLL_CTL_PLL_IDDQ_PWRDN_MASK */
225227
0, /* USB_CTRL_USB_PM_BDC_SOFT_RESETB_MASK */

‎drivers/phy/cadence/phy-cadence-sierra.c

Lines changed: 11 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -174,8 +174,9 @@
174174
#define SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG 0x150
175175
#define SIERRA_DEQ_TAU_CTRL2_PREG 0x151
176176
#define SIERRA_DEQ_TAU_CTRL3_PREG 0x152
177-
#define SIERRA_DEQ_OPENEYE_CTRL_PREG 0x158
177+
#define SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG 0x158
178178
#define SIERRA_DEQ_CONCUR_EPIOFFSET_MODE_PREG 0x159
179+
#define SIERRA_DEQ_OPENEYE_CTRL_PREG 0x15C
179180
#define SIERRA_DEQ_PICTRL_PREG 0x161
180181
#define SIERRA_CPICAL_TMRVAL_MODE1_PREG 0x170
181182
#define SIERRA_CPICAL_TMRVAL_MODE0_PREG 0x171
@@ -1733,7 +1734,7 @@ static const struct cdns_reg_pairs ml_pcie_100_no_ssc_ln_regs[] = {
17331734
{0x3C0F, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
17341735
{0x1C0C, SIERRA_DEQ_TAU_CTRL2_PREG},
17351736
{0x0100, SIERRA_DEQ_TAU_CTRL3_PREG},
1736-
{0x5E82, SIERRA_DEQ_OPENEYE_CTRL_PREG},
1737+
{0x5E82, SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG},
17371738
{0x002B, SIERRA_CPI_TRIM_PREG},
17381739
{0x0003, SIERRA_EPI_CTRL_PREG},
17391740
{0x803F, SIERRA_SDFILT_H2L_A_PREG},
@@ -1797,7 +1798,7 @@ static const struct cdns_reg_pairs ti_ml_pcie_100_no_ssc_ln_regs[] = {
17971798
{0x3C0F, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
17981799
{0x1C0C, SIERRA_DEQ_TAU_CTRL2_PREG},
17991800
{0x0100, SIERRA_DEQ_TAU_CTRL3_PREG},
1800-
{0x5E82, SIERRA_DEQ_OPENEYE_CTRL_PREG},
1801+
{0x5E82, SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG},
18011802
{0x002B, SIERRA_CPI_TRIM_PREG},
18021803
{0x0003, SIERRA_EPI_CTRL_PREG},
18031804
{0x803F, SIERRA_SDFILT_H2L_A_PREG},
@@ -1874,7 +1875,7 @@ static const struct cdns_reg_pairs ml_pcie_100_int_ssc_ln_regs[] = {
18741875
{0x3C0F, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
18751876
{0x1C0C, SIERRA_DEQ_TAU_CTRL2_PREG},
18761877
{0x0100, SIERRA_DEQ_TAU_CTRL3_PREG},
1877-
{0x5E82, SIERRA_DEQ_OPENEYE_CTRL_PREG},
1878+
{0x5E82, SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG},
18781879
{0x002B, SIERRA_CPI_TRIM_PREG},
18791880
{0x0003, SIERRA_EPI_CTRL_PREG},
18801881
{0x803F, SIERRA_SDFILT_H2L_A_PREG},
@@ -1941,7 +1942,7 @@ static const struct cdns_reg_pairs ti_ml_pcie_100_int_ssc_ln_regs[] = {
19411942
{0x3C0F, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
19421943
{0x1C0C, SIERRA_DEQ_TAU_CTRL2_PREG},
19431944
{0x0100, SIERRA_DEQ_TAU_CTRL3_PREG},
1944-
{0x5E82, SIERRA_DEQ_OPENEYE_CTRL_PREG},
1945+
{0x5E82, SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG},
19451946
{0x002B, SIERRA_CPI_TRIM_PREG},
19461947
{0x0003, SIERRA_EPI_CTRL_PREG},
19471948
{0x803F, SIERRA_SDFILT_H2L_A_PREG},
@@ -2012,7 +2013,7 @@ static const struct cdns_reg_pairs ml_pcie_100_ext_ssc_ln_regs[] = {
20122013
{0x3C0F, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
20132014
{0x1C0C, SIERRA_DEQ_TAU_CTRL2_PREG},
20142015
{0x0100, SIERRA_DEQ_TAU_CTRL3_PREG},
2015-
{0x5E82, SIERRA_DEQ_OPENEYE_CTRL_PREG},
2016+
{0x5E82, SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG},
20162017
{0x002B, SIERRA_CPI_TRIM_PREG},
20172018
{0x0003, SIERRA_EPI_CTRL_PREG},
20182019
{0x803F, SIERRA_SDFILT_H2L_A_PREG},
@@ -2079,7 +2080,7 @@ static const struct cdns_reg_pairs ti_ml_pcie_100_ext_ssc_ln_regs[] = {
20792080
{0x3C0F, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
20802081
{0x1C0C, SIERRA_DEQ_TAU_CTRL2_PREG},
20812082
{0x0100, SIERRA_DEQ_TAU_CTRL3_PREG},
2082-
{0x5E82, SIERRA_DEQ_OPENEYE_CTRL_PREG},
2083+
{0x5E82, SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG},
20832084
{0x002B, SIERRA_CPI_TRIM_PREG},
20842085
{0x0003, SIERRA_EPI_CTRL_PREG},
20852086
{0x803F, SIERRA_SDFILT_H2L_A_PREG},
@@ -2140,7 +2141,7 @@ static const struct cdns_reg_pairs cdns_pcie_ln_regs_no_ssc[] = {
21402141
{0x3C0F, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
21412142
{0x1C0C, SIERRA_DEQ_TAU_CTRL2_PREG},
21422143
{0x0100, SIERRA_DEQ_TAU_CTRL3_PREG},
2143-
{0x5E82, SIERRA_DEQ_OPENEYE_CTRL_PREG},
2144+
{0x5E82, SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG},
21442145
{0x002B, SIERRA_CPI_TRIM_PREG},
21452146
{0x0003, SIERRA_EPI_CTRL_PREG},
21462147
{0x803F, SIERRA_SDFILT_H2L_A_PREG},
@@ -2215,7 +2216,7 @@ static const struct cdns_reg_pairs cdns_pcie_ln_regs_int_ssc[] = {
22152216
{0x3C0F, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
22162217
{0x1C0C, SIERRA_DEQ_TAU_CTRL2_PREG},
22172218
{0x0100, SIERRA_DEQ_TAU_CTRL3_PREG},
2218-
{0x5E82, SIERRA_DEQ_OPENEYE_CTRL_PREG},
2219+
{0x5E82, SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG},
22192220
{0x002B, SIERRA_CPI_TRIM_PREG},
22202221
{0x0003, SIERRA_EPI_CTRL_PREG},
22212222
{0x803F, SIERRA_SDFILT_H2L_A_PREG},
@@ -2284,7 +2285,7 @@ static const struct cdns_reg_pairs cdns_pcie_ln_regs_ext_ssc[] = {
22842285
{0x3C0F, SIERRA_DEQ_TAU_CTRL1_SLOW_MAINT_PREG},
22852286
{0x1C0C, SIERRA_DEQ_TAU_CTRL2_PREG},
22862287
{0x0100, SIERRA_DEQ_TAU_CTRL3_PREG},
2287-
{0x5E82, SIERRA_DEQ_OPENEYE_CTRL_PREG},
2288+
{0x5E82, SIERRA_DEQ_TAU_EPIOFFSET_MODE_PREG},
22882289
{0x002B, SIERRA_CPI_TRIM_PREG},
22892290
{0x0003, SIERRA_EPI_CTRL_PREG},
22902291
{0x803F, SIERRA_SDFILT_H2L_A_PREG},

‎drivers/phy/freescale/phy-fsl-imx8m-pcie.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -141,11 +141,6 @@ static int imx8_pcie_phy_power_on(struct phy *phy)
141141
IMX8MM_GPR_PCIE_REF_CLK_PLL);
142142
usleep_range(100, 200);
143143

144-
/* Do the PHY common block reset */
145-
regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14,
146-
IMX8MM_GPR_PCIE_CMN_RST,
147-
IMX8MM_GPR_PCIE_CMN_RST);
148-
149144
switch (imx8_phy->drvdata->variant) {
150145
case IMX8MP:
151146
reset_control_deassert(imx8_phy->perst);
@@ -156,6 +151,11 @@ static int imx8_pcie_phy_power_on(struct phy *phy)
156151
break;
157152
}
158153

154+
/* Do the PHY common block reset */
155+
regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14,
156+
IMX8MM_GPR_PCIE_CMN_RST,
157+
IMX8MM_GPR_PCIE_CMN_RST);
158+
159159
/* Polling to check the phy is ready or not. */
160160
ret = readl_poll_timeout(imx8_phy->base + IMX8MM_PCIE_PHY_CMN_REG075,
161161
val, val == ANA_PLL_DONE, 10, 20000);

‎drivers/phy/qualcomm/phy-qcom-qmp-combo.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3673,6 +3673,7 @@ static int qmp_combo_probe(struct platform_device *pdev)
36733673
return -ENOMEM;
36743674

36753675
qmp->dev = dev;
3676+
dev_set_drvdata(dev, qmp);
36763677

36773678
qmp->orientation = TYPEC_ORIENTATION_NORMAL;
36783679

@@ -3749,8 +3750,6 @@ static int qmp_combo_probe(struct platform_device *pdev)
37493750

37503751
phy_set_drvdata(qmp->dp_phy, qmp);
37513752

3752-
dev_set_drvdata(dev, qmp);
3753-
37543753
if (usb_np == dev->of_node)
37553754
phy_provider = devm_of_phy_provider_register(dev, qmp_combo_phy_xlate);
37563755
else

‎drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3661,8 +3661,8 @@ static const struct qmp_phy_cfg x1e80100_qmp_gen4x2_pciephy_cfg = {
36613661

36623662
.reset_list = sdm845_pciephy_reset_l,
36633663
.num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l),
3664-
.vreg_list = sm8550_qmp_phy_vreg_l,
3665-
.num_vregs = ARRAY_SIZE(sm8550_qmp_phy_vreg_l),
3664+
.vreg_list = qmp_phy_vreg_l,
3665+
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
36663666
.regs = pciephy_v6_regs_layout,
36673667

36683668
.pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL,
@@ -3695,8 +3695,8 @@ static const struct qmp_phy_cfg x1e80100_qmp_gen4x4_pciephy_cfg = {
36953695

36963696
.reset_list = sdm845_pciephy_reset_l,
36973697
.num_resets = ARRAY_SIZE(sdm845_pciephy_reset_l),
3698-
.vreg_list = sm8550_qmp_phy_vreg_l,
3699-
.num_vregs = ARRAY_SIZE(sm8550_qmp_phy_vreg_l),
3698+
.vreg_list = qmp_phy_vreg_l,
3699+
.num_vregs = ARRAY_SIZE(qmp_phy_vreg_l),
37003700
.regs = pciephy_v6_regs_layout,
37013701

37023702
.pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL,

‎drivers/phy/qualcomm/phy-qcom-qmp-usb-legacy.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1248,6 +1248,7 @@ static int qmp_usb_legacy_probe(struct platform_device *pdev)
12481248
return -ENOMEM;
12491249

12501250
qmp->dev = dev;
1251+
dev_set_drvdata(dev, qmp);
12511252

12521253
qmp->cfg = of_device_get_match_data(dev);
12531254
if (!qmp->cfg)

‎drivers/phy/qualcomm/phy-qcom-qmp-usb.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2179,6 +2179,7 @@ static int qmp_usb_probe(struct platform_device *pdev)
21792179
return -ENOMEM;
21802180

21812181
qmp->dev = dev;
2182+
dev_set_drvdata(dev, qmp);
21822183

21832184
qmp->cfg = of_device_get_match_data(dev);
21842185
if (!qmp->cfg)

‎drivers/phy/qualcomm/phy-qcom-qmp-usbc.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1050,6 +1050,7 @@ static int qmp_usbc_probe(struct platform_device *pdev)
10501050
return -ENOMEM;
10511051

10521052
qmp->dev = dev;
1053+
dev_set_drvdata(dev, qmp);
10531054

10541055
qmp->orientation = TYPEC_ORIENTATION_NORMAL;
10551056

‎drivers/phy/rockchip/Kconfig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,7 @@ config PHY_ROCKCHIP_PCIE
8686
config PHY_ROCKCHIP_SAMSUNG_HDPTX
8787
tristate "Rockchip Samsung HDMI/eDP Combo PHY driver"
8888
depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF
89+
depends on COMMON_CLK
8990
depends on HAS_IOMEM
9091
select GENERIC_PHY
9192
select MFD_SYSCON

‎drivers/phy/starfive/phy-jh7110-usb.c

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -10,18 +10,24 @@
1010
#include <linux/clk.h>
1111
#include <linux/err.h>
1212
#include <linux/io.h>
13+
#include <linux/mfd/syscon.h>
1314
#include <linux/module.h>
1415
#include <linux/phy/phy.h>
1516
#include <linux/platform_device.h>
17+
#include <linux/regmap.h>
1618
#include <linux/usb/of.h>
1719

1820
#define USB_125M_CLK_RATE 125000000
1921
#define USB_LS_KEEPALIVE_OFF 0x4
2022
#define USB_LS_KEEPALIVE_ENABLE BIT(4)
2123

24+
#define USB_PDRSTN_SPLIT BIT(17)
25+
#define SYSCON_USB_SPLIT_OFFSET 0x18
26+
2227
struct jh7110_usb2_phy {
2328
struct phy *phy;
2429
void __iomem *regs;
30+
struct regmap *sys_syscon;
2531
struct clk *usb_125m_clk;
2632
struct clk *app_125m;
2733
enum phy_mode mode;
@@ -61,6 +67,10 @@ static int usb2_phy_set_mode(struct phy *_phy,
6167
usb2_set_ls_keepalive(phy, (mode != PHY_MODE_USB_DEVICE));
6268
}
6369

70+
/* Connect usb 2.0 phy mode */
71+
regmap_update_bits(phy->sys_syscon, SYSCON_USB_SPLIT_OFFSET,
72+
USB_PDRSTN_SPLIT, USB_PDRSTN_SPLIT);
73+
6474
return 0;
6575
}
6676

@@ -129,6 +139,12 @@ static int jh7110_usb_phy_probe(struct platform_device *pdev)
129139
phy_set_drvdata(phy->phy, phy);
130140
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
131141

142+
phy->sys_syscon =
143+
syscon_regmap_lookup_by_compatible("starfive,jh7110-sys-syscon");
144+
if (IS_ERR(phy->sys_syscon))
145+
return dev_err_probe(dev, PTR_ERR(phy->sys_syscon),
146+
"Failed to get sys-syscon\n");
147+
132148
return PTR_ERR_OR_ZERO(phy_provider);
133149
}
134150

‎drivers/phy/tegra/xusb.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -699,6 +699,8 @@ static int tegra_xusb_setup_usb_role_switch(struct tegra_xusb_port *port)
699699
return -ENOMEM;
700700

701701
lane = tegra_xusb_find_lane(port->padctl, "usb2", port->index);
702+
if (IS_ERR(lane))
703+
return PTR_ERR(lane);
702704

703705
/*
704706
* Assign phy dev to usb-phy dev. Host/device drivers can use phy

‎drivers/phy/ti/phy-j721e-wiz.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -450,8 +450,8 @@ static int wiz_mode_select(struct wiz *wiz)
450450
} else if (wiz->lane_phy_type[i] == PHY_TYPE_USXGMII) {
451451
ret = regmap_field_write(wiz->p0_mac_src_sel[i], 0x3);
452452
ret = regmap_field_write(wiz->p0_rxfclk_sel[i], 0x3);
453-
ret = regmap_field_write(wiz->p0_refclk_sel[i], 0x3);
454-
mode = LANE_MODE_GEN1;
453+
ret = regmap_field_write(wiz->p0_refclk_sel[i], 0x2);
454+
mode = LANE_MODE_GEN2;
455455
} else {
456456
continue;
457457
}

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