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chleroympe
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powerpc/32: Fix critical and debug interrupts on BOOKE
32 bits BOOKE have special interrupts for debug and other critical events. When handling those interrupts, dedicated registers are saved in the stack frame in addition to the standard registers, leading to a shift of the pt_regs struct. Since commit db297c3 ("powerpc/32: Don't save thread.regs on interrupt entry"), the pt_regs struct is expected to be at the same place all the time. Instead of handling a special struct in addition to pt_regs, just add those special registers to struct pt_regs. Fixes: db297c3 ("powerpc/32: Don't save thread.regs on interrupt entry") Cc: [email protected] Reported-by: Radu Rendec <[email protected]> Signed-off-by: Christophe Leroy <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://lore.kernel.org/r/028d5483b4851b01ea4334d0751e7f260419092b.1625637264.git.christophe.leroy@csgroup.eu
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+33
-41
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3 files changed

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-41
lines changed

arch/powerpc/include/asm/ptrace.h

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -70,6 +70,22 @@ struct pt_regs
7070
unsigned long __pad[4]; /* Maintain 16 byte interrupt stack alignment */
7171
};
7272
#endif
73+
#if defined(CONFIG_PPC32) && defined(CONFIG_BOOKE)
74+
struct { /* Must be a multiple of 16 bytes */
75+
unsigned long mas0;
76+
unsigned long mas1;
77+
unsigned long mas2;
78+
unsigned long mas3;
79+
unsigned long mas6;
80+
unsigned long mas7;
81+
unsigned long srr0;
82+
unsigned long srr1;
83+
unsigned long csrr0;
84+
unsigned long csrr1;
85+
unsigned long dsrr0;
86+
unsigned long dsrr1;
87+
};
88+
#endif
7389
};
7490
#endif
7591

arch/powerpc/kernel/asm-offsets.c

Lines changed: 14 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -309,24 +309,21 @@ int main(void)
309309
STACK_PT_REGS_OFFSET(STACK_REGS_IAMR, iamr);
310310
#endif
311311

312-
#if defined(CONFIG_PPC32)
313-
#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
314-
DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
315-
DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
312+
#if defined(CONFIG_PPC32) && defined(CONFIG_BOOKE)
313+
STACK_PT_REGS_OFFSET(MAS0, mas0);
316314
/* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
317-
DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
318-
DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
319-
DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
320-
DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
321-
DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
322-
DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
323-
DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
324-
DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
325-
DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
326-
DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
327-
DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
328-
DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
329-
#endif
315+
STACK_PT_REGS_OFFSET(MMUCR, mas0);
316+
STACK_PT_REGS_OFFSET(MAS1, mas1);
317+
STACK_PT_REGS_OFFSET(MAS2, mas2);
318+
STACK_PT_REGS_OFFSET(MAS3, mas3);
319+
STACK_PT_REGS_OFFSET(MAS6, mas6);
320+
STACK_PT_REGS_OFFSET(MAS7, mas7);
321+
STACK_PT_REGS_OFFSET(_SRR0, srr0);
322+
STACK_PT_REGS_OFFSET(_SRR1, srr1);
323+
STACK_PT_REGS_OFFSET(_CSRR0, csrr0);
324+
STACK_PT_REGS_OFFSET(_CSRR1, csrr1);
325+
STACK_PT_REGS_OFFSET(_DSRR0, dsrr0);
326+
STACK_PT_REGS_OFFSET(_DSRR1, dsrr1);
330327
#endif
331328

332329
/* About the CPU features table */

arch/powerpc/kernel/head_booke.h

Lines changed: 3 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -168,20 +168,18 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
168168
/* only on e500mc */
169169
#define DBG_STACK_BASE dbgirq_ctx
170170

171-
#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)
172-
173171
#ifdef CONFIG_SMP
174172
#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
175173
mfspr r8,SPRN_PIR; \
176174
slwi r8,r8,2; \
177175
addis r8,r8,level##_STACK_BASE@ha; \
178176
lwz r8,level##_STACK_BASE@l(r8); \
179-
addi r8,r8,EXC_LVL_FRAME_OVERHEAD;
177+
addi r8,r8,THREAD_SIZE - INT_FRAME_SIZE;
180178
#else
181179
#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
182180
lis r8,level##_STACK_BASE@ha; \
183181
lwz r8,level##_STACK_BASE@l(r8); \
184-
addi r8,r8,EXC_LVL_FRAME_OVERHEAD;
182+
addi r8,r8,THREAD_SIZE - INT_FRAME_SIZE;
185183
#endif
186184

187185
/*
@@ -208,7 +206,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
208206
mtmsr r11; \
209207
mfspr r11,SPRN_SPRG_THREAD; /* if from user, start at top of */\
210208
lwz r11, TASK_STACK - THREAD(r11); /* this thread's kernel stack */\
211-
addi r11,r11,EXC_LVL_FRAME_OVERHEAD; /* allocate stack frame */\
209+
addi r11,r11,THREAD_SIZE - INT_FRAME_SIZE; /* allocate stack frame */\
212210
beq 1f; \
213211
/* COMING FROM USER MODE */ \
214212
stw r9,_CCR(r11); /* save CR */\
@@ -516,24 +514,5 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
516514
bl kernel_fp_unavailable_exception; \
517515
b interrupt_return
518516

519-
#else /* __ASSEMBLY__ */
520-
struct exception_regs {
521-
unsigned long mas0;
522-
unsigned long mas1;
523-
unsigned long mas2;
524-
unsigned long mas3;
525-
unsigned long mas6;
526-
unsigned long mas7;
527-
unsigned long srr0;
528-
unsigned long srr1;
529-
unsigned long csrr0;
530-
unsigned long csrr1;
531-
unsigned long dsrr0;
532-
unsigned long dsrr1;
533-
};
534-
535-
/* ensure this structure is always sized to a multiple of the stack alignment */
536-
#define STACK_EXC_LVL_FRAME_SIZE ALIGN(sizeof (struct exception_regs), 16)
537-
538517
#endif /* __ASSEMBLY__ */
539518
#endif /* __HEAD_BOOKE_H__ */

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