@@ -8543,6 +8543,116 @@ static inline void mlxsw_reg_rxltm_pack(char *payload, u8 m0_val_v4, u8 m0_val_v
8543
8543
mlxsw_reg_rxltm_m0_val_v4_set (payload , m0_val_v4 );
8544
8544
}
8545
8545
8546
+ /* RLCMLD - Router LPM Cache ML Delete Register
8547
+ * --------------------------------------------
8548
+ * The RLCMLD register is used to bulk delete the XLT-LPM cache ML entries.
8549
+ * This can be used by SW when L is increased or decreased, thus need to
8550
+ * remove entries with old ML values.
8551
+ */
8552
+
8553
+ #define MLXSW_REG_RLCMLD_ID 0x8055
8554
+ #define MLXSW_REG_RLCMLD_LEN 0x30
8555
+
8556
+ MLXSW_REG_DEFINE (rlcmld , MLXSW_REG_RLCMLD_ID , MLXSW_REG_RLCMLD_LEN );
8557
+
8558
+ enum mlxsw_reg_rlcmld_select {
8559
+ MLXSW_REG_RLCMLD_SELECT_ML_ENTRIES ,
8560
+ MLXSW_REG_RLCMLD_SELECT_M_ENTRIES ,
8561
+ MLXSW_REG_RLCMLD_SELECT_M_AND_ML_ENTRIES ,
8562
+ };
8563
+
8564
+ /* reg_rlcmld_select
8565
+ * Which entries to delete.
8566
+ * Access: Index
8567
+ */
8568
+ MLXSW_ITEM32 (reg , rlcmld , select , 0x00 , 16 , 2 );
8569
+
8570
+ enum mlxsw_reg_rlcmld_filter_fields {
8571
+ MLXSW_REG_RLCMLD_FILTER_FIELDS_BY_PROTOCOL = 0x04 ,
8572
+ MLXSW_REG_RLCMLD_FILTER_FIELDS_BY_VIRTUAL_ROUTER = 0x08 ,
8573
+ MLXSW_REG_RLCMLD_FILTER_FIELDS_BY_DIP = 0x10 ,
8574
+ };
8575
+
8576
+ /* reg_rlcmld_filter_fields
8577
+ * If a bit is '0' then the relevant field is ignored.
8578
+ * Access: Index
8579
+ */
8580
+ MLXSW_ITEM32 (reg , rlcmld , filter_fields , 0x00 , 0 , 8 );
8581
+
8582
+ enum mlxsw_reg_rlcmld_protocol {
8583
+ MLXSW_REG_RLCMLD_PROTOCOL_UC_IPV4 ,
8584
+ MLXSW_REG_RLCMLD_PROTOCOL_UC_IPV6 ,
8585
+ };
8586
+
8587
+ /* reg_rlcmld_protocol
8588
+ * Access: Index
8589
+ */
8590
+ MLXSW_ITEM32 (reg , rlcmld , protocol , 0x08 , 0 , 4 );
8591
+
8592
+ /* reg_rlcmld_virtual_router
8593
+ * Virtual router ID.
8594
+ * Range is 0..cap_max_virtual_routers-1
8595
+ * Access: Index
8596
+ */
8597
+ MLXSW_ITEM32 (reg , rlcmld , virtual_router , 0x0C , 0 , 16 );
8598
+
8599
+ /* reg_rlcmld_dip
8600
+ * The prefix of the route or of the marker that the object of the LPM
8601
+ * is compared with. The most significant bits of the dip are the prefix.
8602
+ * Access: Index
8603
+ */
8604
+ MLXSW_ITEM32 (reg , rlcmld , dip4 , 0x1C , 0 , 32 );
8605
+ MLXSW_ITEM_BUF (reg , rlcmld , dip6 , 0x10 , 16 );
8606
+
8607
+ /* reg_rlcmld_dip_mask
8608
+ * per bit:
8609
+ * 0: no match
8610
+ * 1: match
8611
+ * Access: Index
8612
+ */
8613
+ MLXSW_ITEM32 (reg , rlcmld , dip_mask4 , 0x2C , 0 , 32 );
8614
+ MLXSW_ITEM_BUF (reg , rlcmld , dip_mask6 , 0x20 , 16 );
8615
+
8616
+ static inline void __mlxsw_reg_rlcmld_pack (char * payload ,
8617
+ enum mlxsw_reg_rlcmld_select select ,
8618
+ enum mlxsw_reg_rlcmld_protocol protocol ,
8619
+ u16 virtual_router )
8620
+ {
8621
+ u8 filter_fields = MLXSW_REG_RLCMLD_FILTER_FIELDS_BY_PROTOCOL |
8622
+ MLXSW_REG_RLCMLD_FILTER_FIELDS_BY_VIRTUAL_ROUTER |
8623
+ MLXSW_REG_RLCMLD_FILTER_FIELDS_BY_DIP ;
8624
+
8625
+ MLXSW_REG_ZERO (rlcmld , payload );
8626
+ mlxsw_reg_rlcmld_select_set (payload , select );
8627
+ mlxsw_reg_rlcmld_filter_fields_set (payload , filter_fields );
8628
+ mlxsw_reg_rlcmld_protocol_set (payload , protocol );
8629
+ mlxsw_reg_rlcmld_virtual_router_set (payload , virtual_router );
8630
+ }
8631
+
8632
+ static inline void mlxsw_reg_rlcmld_pack4 (char * payload ,
8633
+ enum mlxsw_reg_rlcmld_select select ,
8634
+ u16 virtual_router ,
8635
+ u32 dip , u32 dip_mask )
8636
+ {
8637
+ __mlxsw_reg_rlcmld_pack (payload , select ,
8638
+ MLXSW_REG_RLCMLD_PROTOCOL_UC_IPV4 ,
8639
+ virtual_router );
8640
+ mlxsw_reg_rlcmld_dip4_set (payload , dip );
8641
+ mlxsw_reg_rlcmld_dip_mask4_set (payload , dip_mask );
8642
+ }
8643
+
8644
+ static inline void mlxsw_reg_rlcmld_pack6 (char * payload ,
8645
+ enum mlxsw_reg_rlcmld_select select ,
8646
+ u16 virtual_router ,
8647
+ const void * dip , const void * dip_mask )
8648
+ {
8649
+ __mlxsw_reg_rlcmld_pack (payload , select ,
8650
+ MLXSW_REG_RLCMLD_PROTOCOL_UC_IPV6 ,
8651
+ virtual_router );
8652
+ mlxsw_reg_rlcmld_dip6_memcpy_to (payload , dip );
8653
+ mlxsw_reg_rlcmld_dip_mask6_memcpy_to (payload , dip_mask );
8654
+ }
8655
+
8546
8656
/* Note that XLTQ, XMDR, XRMT and XRALXX register positions violate the rule
8547
8657
* of ordering register definitions by the ID. However, XRALXX pack helpers are
8548
8658
* using RALXX pack helpers, RALXX registers have higher IDs.
@@ -11917,6 +12027,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
11917
12027
MLXSW_REG (rmft2 ),
11918
12028
MLXSW_REG (rxlte ),
11919
12029
MLXSW_REG (rxltm ),
12030
+ MLXSW_REG (rlcmld ),
11920
12031
MLXSW_REG (xltq ),
11921
12032
MLXSW_REG (xmdr ),
11922
12033
MLXSW_REG (xrmt ),
0 commit comments