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[NFC][LLVM][AArch64] Cleanup pass initialization for AArch64 (llvm#134315)
- Remove calls to pass initialization from pass constructors. - llvm#111767
1 parent 783201b commit 23c27f3

27 files changed

+64
-120
lines changed

‎llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -81,9 +81,7 @@ class AArch64A53Fix835769 : public MachineFunctionPass {
8181

8282
public:
8383
static char ID;
84-
explicit AArch64A53Fix835769() : MachineFunctionPass(ID) {
85-
initializeAArch64A53Fix835769Pass(*PassRegistry::getPassRegistry());
86-
}
84+
explicit AArch64A53Fix835769() : MachineFunctionPass(ID) {}
8785

8886
bool runOnMachineFunction(MachineFunction &F) override;
8987

‎llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -112,9 +112,7 @@ class AArch64A57FPLoadBalancing : public MachineFunctionPass {
112112

113113
public:
114114
static char ID;
115-
explicit AArch64A57FPLoadBalancing() : MachineFunctionPass(ID) {
116-
initializeAArch64A57FPLoadBalancingPass(*PassRegistry::getPassRegistry());
117-
}
115+
explicit AArch64A57FPLoadBalancing() : MachineFunctionPass(ID) {}
118116

119117
bool runOnMachineFunction(MachineFunction &F) override;
120118

‎llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -82,9 +82,7 @@ class AArch64AdvSIMDScalar : public MachineFunctionPass {
8282

8383
public:
8484
static char ID; // Pass identification, replacement for typeid.
85-
explicit AArch64AdvSIMDScalar() : MachineFunctionPass(ID) {
86-
initializeAArch64AdvSIMDScalarPass(*PassRegistry::getPassRegistry());
87-
}
85+
explicit AArch64AdvSIMDScalar() : MachineFunctionPass(ID) {}
8886

8987
bool runOnMachineFunction(MachineFunction &F) override;
9088

‎llvm/lib/Target/AArch64/AArch64Arm64ECCallLowering.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -63,9 +63,7 @@ struct ThunkArgInfo {
6363
class AArch64Arm64ECCallLowering : public ModulePass {
6464
public:
6565
static char ID;
66-
AArch64Arm64ECCallLowering() : ModulePass(ID) {
67-
initializeAArch64Arm64ECCallLoweringPass(*PassRegistry::getPassRegistry());
68-
}
66+
AArch64Arm64ECCallLowering() : ModulePass(ID) {}
6967

7068
Function *buildExitThunk(FunctionType *FnTy, AttributeList Attrs);
7169
Function *buildEntryThunk(Function *F);

‎llvm/lib/Target/AArch64/AArch64CompressJumpTables.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -47,9 +47,7 @@ class AArch64CompressJumpTables : public MachineFunctionPass {
4747

4848
public:
4949
static char ID;
50-
AArch64CompressJumpTables() : MachineFunctionPass(ID) {
51-
initializeAArch64CompressJumpTablesPass(*PassRegistry::getPassRegistry());
52-
}
50+
AArch64CompressJumpTables() : MachineFunctionPass(ID) {}
5351

5452
bool runOnMachineFunction(MachineFunction &MF) override;
5553

‎llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -52,9 +52,7 @@ class AArch64CondBrTuning : public MachineFunctionPass {
5252

5353
public:
5454
static char ID;
55-
AArch64CondBrTuning() : MachineFunctionPass(ID) {
56-
initializeAArch64CondBrTuningPass(*PassRegistry::getPassRegistry());
57-
}
55+
AArch64CondBrTuning() : MachineFunctionPass(ID) {}
5856
void getAnalysisUsage(AnalysisUsage &AU) const override;
5957
bool runOnMachineFunction(MachineFunction &MF) override;
6058
StringRef getPassName() const override { return AARCH64_CONDBR_TUNING_NAME; }

‎llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -103,9 +103,7 @@ class AArch64ConditionOptimizer : public MachineFunctionPass {
103103

104104
static char ID;
105105

106-
AArch64ConditionOptimizer() : MachineFunctionPass(ID) {
107-
initializeAArch64ConditionOptimizerPass(*PassRegistry::getPassRegistry());
108-
}
106+
AArch64ConditionOptimizer() : MachineFunctionPass(ID) {}
109107

110108
void getAnalysisUsage(AnalysisUsage &AU) const override;
111109
MachineInstr *findSuitableCompare(MachineBasicBlock *MBB);

‎llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -771,9 +771,7 @@ class AArch64ConditionalCompares : public MachineFunctionPass {
771771

772772
public:
773773
static char ID;
774-
AArch64ConditionalCompares() : MachineFunctionPass(ID) {
775-
initializeAArch64ConditionalComparesPass(*PassRegistry::getPassRegistry());
776-
}
774+
AArch64ConditionalCompares() : MachineFunctionPass(ID) {}
777775
void getAnalysisUsage(AnalysisUsage &AU) const override;
778776
bool runOnMachineFunction(MachineFunction &MF) override;
779777
StringRef getPassName() const override {

‎llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -40,10 +40,7 @@ class AArch64DeadRegisterDefinitions : public MachineFunctionPass {
4040
void processMachineBasicBlock(MachineBasicBlock &MBB);
4141
public:
4242
static char ID; // Pass identification, replacement for typeid.
43-
AArch64DeadRegisterDefinitions() : MachineFunctionPass(ID) {
44-
initializeAArch64DeadRegisterDefinitionsPass(
45-
*PassRegistry::getPassRegistry());
46-
}
43+
AArch64DeadRegisterDefinitions() : MachineFunctionPass(ID) {}
4744

4845
bool runOnMachineFunction(MachineFunction &F) override;
4946

‎llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,9 +50,7 @@ class AArch64ExpandPseudo : public MachineFunctionPass {
5050

5151
static char ID;
5252

53-
AArch64ExpandPseudo() : MachineFunctionPass(ID) {
54-
initializeAArch64ExpandPseudoPass(*PassRegistry::getPassRegistry());
55-
}
53+
AArch64ExpandPseudo() : MachineFunctionPass(ID) {}
5654

5755
bool runOnMachineFunction(MachineFunction &Fn) override;
5856

‎llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -124,9 +124,7 @@ using LdStPairFlags = struct LdStPairFlags {
124124
struct AArch64LoadStoreOpt : public MachineFunctionPass {
125125
static char ID;
126126

127-
AArch64LoadStoreOpt() : MachineFunctionPass(ID) {
128-
initializeAArch64LoadStoreOptPass(*PassRegistry::getPassRegistry());
129-
}
127+
AArch64LoadStoreOpt() : MachineFunctionPass(ID) {}
130128

131129
AliasAnalysis *AA;
132130
const AArch64InstrInfo *TII;

‎llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -73,10 +73,7 @@ class AArch64LowerHomogeneousPrologEpilog : public ModulePass {
7373
public:
7474
static char ID;
7575

76-
AArch64LowerHomogeneousPrologEpilog() : ModulePass(ID) {
77-
initializeAArch64LowerHomogeneousPrologEpilogPass(
78-
*PassRegistry::getPassRegistry());
79-
}
76+
AArch64LowerHomogeneousPrologEpilog() : ModulePass(ID) {}
8077
void getAnalysisUsage(AnalysisUsage &AU) const override {
8178
AU.addRequired<MachineModuleInfoWrapperPass>();
8279
AU.addPreserved<MachineModuleInfoWrapperPass>();

‎llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -84,9 +84,7 @@ namespace {
8484
struct AArch64MIPeepholeOpt : public MachineFunctionPass {
8585
static char ID;
8686

87-
AArch64MIPeepholeOpt() : MachineFunctionPass(ID) {
88-
initializeAArch64MIPeepholeOptPass(*PassRegistry::getPassRegistry());
89-
}
87+
AArch64MIPeepholeOpt() : MachineFunctionPass(ID) {}
9088

9189
const AArch64InstrInfo *TII;
9290
const AArch64RegisterInfo *TRI;

‎llvm/lib/Target/AArch64/AArch64PostCoalescerPass.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -21,9 +21,7 @@ namespace {
2121
struct AArch64PostCoalescer : public MachineFunctionPass {
2222
static char ID;
2323

24-
AArch64PostCoalescer() : MachineFunctionPass(ID) {
25-
initializeAArch64PostCoalescerPass(*PassRegistry::getPassRegistry());
26-
}
24+
AArch64PostCoalescer() : MachineFunctionPass(ID) {}
2725

2826
LiveIntervals *LIS;
2927
MachineRegisterInfo *MRI;

‎llvm/lib/Target/AArch64/AArch64PromoteConstant.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -108,9 +108,7 @@ class AArch64PromoteConstant : public ModulePass {
108108

109109
static char ID;
110110

111-
AArch64PromoteConstant() : ModulePass(ID) {
112-
initializeAArch64PromoteConstantPass(*PassRegistry::getPassRegistry());
113-
}
111+
AArch64PromoteConstant() : ModulePass(ID) {}
114112

115113
StringRef getPassName() const override { return "AArch64 Promote Constant"; }
116114

‎llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -78,10 +78,7 @@ class AArch64RedundantCopyElimination : public MachineFunctionPass {
7878

7979
public:
8080
static char ID;
81-
AArch64RedundantCopyElimination() : MachineFunctionPass(ID) {
82-
initializeAArch64RedundantCopyEliminationPass(
83-
*PassRegistry::getPassRegistry());
84-
}
81+
AArch64RedundantCopyElimination() : MachineFunctionPass(ID) {}
8582

8683
struct RegImm {
8784
MCPhysReg Reg;

‎llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -150,9 +150,7 @@ struct AArch64SIMDInstrOpt : public MachineFunctionPass {
150150
// The maximum of N is curently 10 and it is for ST4 case.
151151
static const unsigned MaxNumRepl = 10;
152152

153-
AArch64SIMDInstrOpt() : MachineFunctionPass(ID) {
154-
initializeAArch64SIMDInstrOptPass(*PassRegistry::getPassRegistry());
155-
}
153+
AArch64SIMDInstrOpt() : MachineFunctionPass(ID) {}
156154

157155
/// Based only on latency of instructions, determine if it is cost efficient
158156
/// to replace the instruction InstDesc by the instructions stored in the

‎llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -126,9 +126,7 @@ class AArch64SpeculationHardening : public MachineFunctionPass {
126126

127127
static char ID;
128128

129-
AArch64SpeculationHardening() : MachineFunctionPass(ID) {
130-
initializeAArch64SpeculationHardeningPass(*PassRegistry::getPassRegistry());
131-
}
129+
AArch64SpeculationHardening() : MachineFunctionPass(ID) {}
132130

133131
bool runOnMachineFunction(MachineFunction &Fn) override;
134132

‎llvm/lib/Target/AArch64/AArch64StackTagging.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -309,9 +309,7 @@ class AArch64StackTagging : public FunctionPass {
309309
: FunctionPass(ID),
310310
MergeInit(ClMergeInit.getNumOccurrences() ? ClMergeInit : !IsOptNone),
311311
UseStackSafety(ClUseStackSafety.getNumOccurrences() ? ClUseStackSafety
312-
: !IsOptNone) {
313-
initializeAArch64StackTaggingPass(*PassRegistry::getPassRegistry());
314-
}
312+
: !IsOptNone) {}
315313

316314
void tagAlloca(AllocaInst *AI, Instruction *InsertBefore, Value *Ptr,
317315
uint64_t Size);

‎llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -62,9 +62,7 @@ class AArch64StackTaggingPreRA : public MachineFunctionPass {
6262

6363
public:
6464
static char ID;
65-
AArch64StackTaggingPreRA() : MachineFunctionPass(ID) {
66-
initializeAArch64StackTaggingPreRAPass(*PassRegistry::getPassRegistry());
67-
}
65+
AArch64StackTaggingPreRA() : MachineFunctionPass(ID) {}
6866

6967
bool mayUseUncheckedLoadStore();
7068
void uncheckUsesOf(unsigned TaggedReg, int FI);

‎llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -38,9 +38,7 @@ class AArch64StorePairSuppress : public MachineFunctionPass {
3838

3939
public:
4040
static char ID;
41-
AArch64StorePairSuppress() : MachineFunctionPass(ID) {
42-
initializeAArch64StorePairSuppressPass(*PassRegistry::getPassRegistry());
43-
}
41+
AArch64StorePairSuppress() : MachineFunctionPass(ID) {}
4442

4543
StringRef getPassName() const override { return STPSUPPRESS_PASS_NAME; }
4644

‎llvm/lib/Target/AArch64/AArch64TargetMachine.cpp

Lines changed: 42 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -230,45 +230,46 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target() {
230230
RegisterTargetMachine<AArch64leTargetMachine> Z(getTheARM64Target());
231231
RegisterTargetMachine<AArch64leTargetMachine> W(getTheARM64_32Target());
232232
RegisterTargetMachine<AArch64leTargetMachine> V(getTheAArch64_32Target());
233-
auto PR = PassRegistry::getPassRegistry();
234-
initializeGlobalISel(*PR);
235-
initializeAArch64A53Fix835769Pass(*PR);
236-
initializeAArch64A57FPLoadBalancingPass(*PR);
237-
initializeAArch64AdvSIMDScalarPass(*PR);
238-
initializeAArch64BranchTargetsPass(*PR);
239-
initializeAArch64CollectLOHPass(*PR);
240-
initializeAArch64CompressJumpTablesPass(*PR);
241-
initializeAArch64ConditionalComparesPass(*PR);
242-
initializeAArch64ConditionOptimizerPass(*PR);
243-
initializeAArch64DeadRegisterDefinitionsPass(*PR);
244-
initializeAArch64ExpandPseudoPass(*PR);
245-
initializeAArch64LoadStoreOptPass(*PR);
246-
initializeAArch64MIPeepholeOptPass(*PR);
247-
initializeAArch64SIMDInstrOptPass(*PR);
248-
initializeAArch64O0PreLegalizerCombinerPass(*PR);
249-
initializeAArch64PreLegalizerCombinerPass(*PR);
250-
initializeAArch64PointerAuthPass(*PR);
251-
initializeAArch64PostCoalescerPass(*PR);
252-
initializeAArch64PostLegalizerCombinerPass(*PR);
253-
initializeAArch64PostLegalizerLoweringPass(*PR);
254-
initializeAArch64PostSelectOptimizePass(*PR);
255-
initializeAArch64PromoteConstantPass(*PR);
256-
initializeAArch64RedundantCopyEliminationPass(*PR);
257-
initializeAArch64StorePairSuppressPass(*PR);
258-
initializeFalkorHWPFFixPass(*PR);
259-
initializeFalkorMarkStridedAccessesLegacyPass(*PR);
260-
initializeLDTLSCleanupPass(*PR);
261-
initializeKCFIPass(*PR);
262-
initializeSMEABIPass(*PR);
263-
initializeSMEPeepholeOptPass(*PR);
264-
initializeSVEIntrinsicOptsPass(*PR);
265-
initializeAArch64SpeculationHardeningPass(*PR);
266-
initializeAArch64SLSHardeningPass(*PR);
267-
initializeAArch64StackTaggingPass(*PR);
268-
initializeAArch64StackTaggingPreRAPass(*PR);
269-
initializeAArch64LowerHomogeneousPrologEpilogPass(*PR);
270-
initializeAArch64DAGToDAGISelLegacyPass(*PR);
271-
initializeAArch64CondBrTuningPass(*PR);
233+
auto &PR = *PassRegistry::getPassRegistry();
234+
initializeGlobalISel(PR);
235+
initializeAArch64A53Fix835769Pass(PR);
236+
initializeAArch64A57FPLoadBalancingPass(PR);
237+
initializeAArch64AdvSIMDScalarPass(PR);
238+
initializeAArch64BranchTargetsPass(PR);
239+
initializeAArch64CollectLOHPass(PR);
240+
initializeAArch64CompressJumpTablesPass(PR);
241+
initializeAArch64ConditionalComparesPass(PR);
242+
initializeAArch64ConditionOptimizerPass(PR);
243+
initializeAArch64DeadRegisterDefinitionsPass(PR);
244+
initializeAArch64ExpandPseudoPass(PR);
245+
initializeAArch64LoadStoreOptPass(PR);
246+
initializeAArch64MIPeepholeOptPass(PR);
247+
initializeAArch64SIMDInstrOptPass(PR);
248+
initializeAArch64O0PreLegalizerCombinerPass(PR);
249+
initializeAArch64PreLegalizerCombinerPass(PR);
250+
initializeAArch64PointerAuthPass(PR);
251+
initializeAArch64PostCoalescerPass(PR);
252+
initializeAArch64PostLegalizerCombinerPass(PR);
253+
initializeAArch64PostLegalizerLoweringPass(PR);
254+
initializeAArch64PostSelectOptimizePass(PR);
255+
initializeAArch64PromoteConstantPass(PR);
256+
initializeAArch64RedundantCopyEliminationPass(PR);
257+
initializeAArch64StorePairSuppressPass(PR);
258+
initializeFalkorHWPFFixPass(PR);
259+
initializeFalkorMarkStridedAccessesLegacyPass(PR);
260+
initializeLDTLSCleanupPass(PR);
261+
initializeKCFIPass(PR);
262+
initializeSMEABIPass(PR);
263+
initializeSMEPeepholeOptPass(PR);
264+
initializeSVEIntrinsicOptsPass(PR);
265+
initializeAArch64SpeculationHardeningPass(PR);
266+
initializeAArch64SLSHardeningPass(PR);
267+
initializeAArch64StackTaggingPass(PR);
268+
initializeAArch64StackTaggingPreRAPass(PR);
269+
initializeAArch64LowerHomogeneousPrologEpilogPass(PR);
270+
initializeAArch64DAGToDAGISelLegacyPass(PR);
271+
initializeAArch64CondBrTuningPass(PR);
272+
initializeAArch64Arm64ECCallLoweringPass(PR);
272273
}
273274

274275
void AArch64TargetMachine::reset() { SubtargetMap.clear(); }
@@ -333,8 +334,9 @@ getEffectiveAArch64CodeModel(const Triple &TT,
333334
*CM != CodeModel::Large) {
334335
report_fatal_error(
335336
"Only small, tiny and large code models are allowed on AArch64");
336-
} else if (*CM == CodeModel::Tiny && !TT.isOSBinFormatELF())
337+
} else if (*CM == CodeModel::Tiny && !TT.isOSBinFormatELF()) {
337338
report_fatal_error("tiny code model is only supported on ELF");
339+
}
338340
return *CM;
339341
}
340342
// The default MCJIT memory managers make no guarantees about where they can

‎llvm/lib/Target/AArch64/GISel/AArch64O0PreLegalizerCombiner.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -142,8 +142,6 @@ void AArch64O0PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
142142

143143
AArch64O0PreLegalizerCombiner::AArch64O0PreLegalizerCombiner()
144144
: MachineFunctionPass(ID) {
145-
initializeAArch64O0PreLegalizerCombinerPass(*PassRegistry::getPassRegistry());
146-
147145
if (!RuleConfig.parseCommandLineOption())
148146
report_fatal_error("Invalid rule identifier");
149147
}

‎llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -533,8 +533,6 @@ void AArch64PostLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
533533

534534
AArch64PostLegalizerCombiner::AArch64PostLegalizerCombiner(bool IsOptNone)
535535
: MachineFunctionPass(ID), IsOptNone(IsOptNone) {
536-
initializeAArch64PostLegalizerCombinerPass(*PassRegistry::getPassRegistry());
537-
538536
if (!RuleConfig.parseCommandLineOption())
539537
report_fatal_error("Invalid rule identifier");
540538
}

‎llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1322,8 +1322,6 @@ void AArch64PostLegalizerLowering::getAnalysisUsage(AnalysisUsage &AU) const {
13221322

13231323
AArch64PostLegalizerLowering::AArch64PostLegalizerLowering()
13241324
: MachineFunctionPass(ID) {
1325-
initializeAArch64PostLegalizerLoweringPass(*PassRegistry::getPassRegistry());
1326-
13271325
if (!RuleConfig.parseCommandLineOption())
13281326
report_fatal_error("Invalid rule identifier");
13291327
}

‎llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ class AArch64PostSelectOptimize : public MachineFunctionPass {
3333
public:
3434
static char ID;
3535

36-
AArch64PostSelectOptimize();
36+
AArch64PostSelectOptimize() : MachineFunctionPass(ID) {}
3737

3838
StringRef getPassName() const override {
3939
return "AArch64 Post Select Optimizer";
@@ -59,11 +59,6 @@ void AArch64PostSelectOptimize::getAnalysisUsage(AnalysisUsage &AU) const {
5959
MachineFunctionPass::getAnalysisUsage(AU);
6060
}
6161

62-
AArch64PostSelectOptimize::AArch64PostSelectOptimize()
63-
: MachineFunctionPass(ID) {
64-
initializeAArch64PostSelectOptimizePass(*PassRegistry::getPassRegistry());
65-
}
66-
6762
unsigned getNonFlagSettingVariant(unsigned Opc) {
6863
switch (Opc) {
6964
default:

‎llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -831,8 +831,6 @@ void AArch64PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
831831

832832
AArch64PreLegalizerCombiner::AArch64PreLegalizerCombiner()
833833
: MachineFunctionPass(ID) {
834-
initializeAArch64PreLegalizerCombinerPass(*PassRegistry::getPassRegistry());
835-
836834
if (!RuleConfig.parseCommandLineOption())
837835
report_fatal_error("Invalid rule identifier");
838836
}

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