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16 | 16 | #ifndef MBED_OBJECTS_H
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17 | 17 | #define MBED_OBJECTS_H
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18 | 18 |
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| 19 | +#include "stdbool.h" |
19 | 20 | #include "cmsis.h"
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20 | 21 | #include "PortNames.h"
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21 | 22 | #include "PeripheralNames.h"
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@@ -60,6 +61,94 @@ struct serial_s {
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60 | 61 | UART_PAR parityType; /* Parity bit type for UART */
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61 | 62 | };
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62 | 63 |
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| 64 | +typedef struct spi_clock_config_s { |
| 65 | + |
| 66 | + //! \param ulSPIClk is the rate of clock supplied to the SPI module. |
| 67 | + uint32_t ulSPIClk; |
| 68 | + |
| 69 | + //! \param ulBitRate is the desired bit rate.(master mode) |
| 70 | + uint32_t ulBitRate; |
| 71 | + |
| 72 | + //! |
| 73 | + //! The SPI module can operate in either master or slave mode. The parameter |
| 74 | + //! \e ulMode can be one of the following |
| 75 | + //! -\b SPI_MODE_MASTER |
| 76 | + //! -\b SPI_MODE_SLAVE |
| 77 | + uint32_t ulMode; |
| 78 | + |
| 79 | + //! |
| 80 | + //! The SPI module supports 4 sub modes based on SPI clock polarity and phase. |
| 81 | + //! |
| 82 | + //! <pre> |
| 83 | + //! Polarity Phase Sub-Mode |
| 84 | + //! 0 0 0 |
| 85 | + //! 0 1 1 |
| 86 | + //! 1 0 2 |
| 87 | + //! 1 1 3 |
| 88 | + //! </pre> |
| 89 | + |
| 90 | + //! Required sub mode can be select by setting \e ulSubMode parameter to one |
| 91 | + //! of the following |
| 92 | + //! - \b SPI_SUB_MODE_0 |
| 93 | + //! - \b SPI_SUB_MODE_1 |
| 94 | + //! - \b SPI_SUB_MODE_2 |
| 95 | + //! - \b SPI_SUB_MODE_3 |
| 96 | + uint32_t ulSubMode; |
| 97 | + |
| 98 | + //! The parameter \e ulConfig is logical OR of five values: the word length, |
| 99 | + //! active level for chip select, software or hardware controlled chip select, |
| 100 | + //! 3 or 4 pin mode and turbo mode. |
| 101 | + //! mode. |
| 102 | + //! |
| 103 | + //! SPI support 8, 16 and 32 bit word lengths defined by:- |
| 104 | + //! - \b SPI_WL_8 |
| 105 | + //! - \b SPI_WL_16 |
| 106 | + //! - \b SPI_WL_32 |
| 107 | + //! |
| 108 | + //! Active state of Chip Select can be defined by:- |
| 109 | + //! - \b SPI_CS_ACTIVELOW |
| 110 | + //! - \b SPI_CS_ACTIVEHIGH |
| 111 | + //! |
| 112 | + //! SPI chip select can be configured to be controlled either by hardware or |
| 113 | + //! software:- |
| 114 | + //! - \b SPI_SW_CS |
| 115 | + //! - \b SPI_HW_CS |
| 116 | + //! |
| 117 | + //! The module can work in 3 or 4 pin mode defined by:- |
| 118 | + //! - \b SPI_3PIN_MODE |
| 119 | + //! - \b SPI_4PIN_MODE |
| 120 | + //! |
| 121 | + //! Turbo mode can be set on or turned off using:- |
| 122 | + //! - \b SPI_TURBO_MODE_ON |
| 123 | + //! - \b SPI_TURBO_MODE_OFF |
| 124 | + uint32_t ulConfig; |
| 125 | +} spi_clock_config_t; |
| 126 | + |
| 127 | +struct spi_s { |
| 128 | + /*! SPI module number */ |
| 129 | + uint32_t instance; |
| 130 | + |
| 131 | + /*! SPICC32XXDMA Peripheral's base address */ |
| 132 | + uint32_t baseAddr; |
| 133 | + |
| 134 | + /*! SPI Word lengh */ |
| 135 | + uint32_t word_length; |
| 136 | + |
| 137 | + /*! SPI clock configuration */ |
| 138 | + spi_clock_config_t clock_config; |
| 139 | + |
| 140 | + /*! Is clock update needed */ |
| 141 | + bool clock_update; |
| 142 | + |
| 143 | + /*! Is CS controlled by GPIO */ |
| 144 | + bool cs_control_gpio; |
| 145 | + |
| 146 | +#if DEVICE_SPI_ASYNCH |
| 147 | + uint32_t handler; |
| 148 | + uint32_t mask; |
| 149 | + uint32_t event; |
| 150 | +#endif |
| 151 | +}; |
63 | 152 | #ifdef __cplusplus
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64 | 153 | }
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65 | 154 | #endif
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