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Merge tag 'soc-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC fixes from Arnd Bergmann: "These all address issues in devicetree files: - The Rockchip rk3588j are now limited the same way as the vendor kernel, to allow room for the industrial-grade temperature ranges. - Seven more Rockchip fixes address minor issues with specific boards - Invalid clk controller references in multiple amlogic chips, plus one accidentally disabled audio on clock - Two devicetree fixes for i.MX8MP boards, both for incorrect regulator settings - A power domain change for apple laptop touchbar, fixing suspend/resume problems - An incorrect DMA controller setting for sophgo cv18xx chips" * tag 'soc-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm64: dts: amazon: Fix simple-bus node name schema warnings MAINTAINERS: delete email for Shiraz Hashim arm64: dts: imx8mp-var-som: Fix LDO5 shutdown causing SD card timeout arm64: dts: imx8mp: use 800MHz NoC OPP for nominal drive mode arm64: dts: amlogic: dreambox: fix missing clkc_audio node riscv: dts: sophgo: fix DMA data-width configuration for CV18xx arm64: dts: rockchip: fix Sige5 RTC interrupt pin arm64: dts: rockchip: Assign RT5616 MCLK rate on rk3588-friendlyelec-cm3588 arm64: dts: rockchip: Align wifi node name with bindings in CB2 arm64: dts: amlogic: g12: fix reference to unknown/untested PWM clock arm64: dts: amlogic: gx: fix reference to unknown/untested PWM clock ARM: dts: amlogic: meson8b: fix reference to unknown/untested PWM clock ARM: dts: amlogic: meson8: fix reference to unknown/untested PWM clock arm64: dts: apple: touchbar: Mark ps_dispdfr_be as always-on mailmap: Update email for Asahi Lina arm64: dts: rockchip: Fix mmc-pwrseq clock name on rock-pi-4 arm64: dts: rockchip: Use "regulator-fixed" for btreg on px30-engicam for vcc3v3-btreg arm64: dts: rockchip: Add pinmuxing for eMMC on QNAP TS433 arm64: dts: rockchip: Remove overdrive-mode OPPs from RK3588J SoC dtsi arm64: dts: rockchip: Allow Turing RK1 cooling fan to spin down
2 parents 9f35e33 + 15eaaa7 commit 00f281f

26 files changed

+93
-63
lines changed

.mailmap

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -102,6 +102,7 @@ Ard Biesheuvel <[email protected]> <[email protected]>
102102
Arnaud Patard <[email protected]>
103103
Arnd Bergmann <[email protected]>
104104
Arun Kumar Neelakantam <[email protected]> <[email protected]>
105+
105106
Ashok Raj Nagarajan <[email protected]> <[email protected]>
106107
107108

MAINTAINERS

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -22916,7 +22916,6 @@ F: drivers/accessibility/speakup/
2291622916

2291722917
SPEAR PLATFORM/CLOCK/PINCTRL SUPPORT
2291822918
M: Viresh Kumar <[email protected]>
22919-
M: Shiraz Hashim <[email protected]>
2292022919
L: [email protected] (moderated for non-subscribers)
2292122920
2292222921
S: Maintained

arch/arm/boot/dts/amlogic/meson8.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -451,7 +451,7 @@
451451
pwm_ef: pwm@86c0 {
452452
compatible = "amlogic,meson8-pwm-v2";
453453
clocks = <&xtal>,
454-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
454+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
455455
<&clkc CLKID_FCLK_DIV4>,
456456
<&clkc CLKID_FCLK_DIV3>;
457457
reg = <0x86c0 0x10>;
@@ -705,15 +705,15 @@
705705
&pwm_ab {
706706
compatible = "amlogic,meson8-pwm-v2";
707707
clocks = <&xtal>,
708-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
708+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
709709
<&clkc CLKID_FCLK_DIV4>,
710710
<&clkc CLKID_FCLK_DIV3>;
711711
};
712712

713713
&pwm_cd {
714714
compatible = "amlogic,meson8-pwm-v2";
715715
clocks = <&xtal>,
716-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
716+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
717717
<&clkc CLKID_FCLK_DIV4>,
718718
<&clkc CLKID_FCLK_DIV3>;
719719
};

arch/arm/boot/dts/amlogic/meson8b.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -406,7 +406,7 @@
406406
compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
407407
reg = <0x86c0 0x10>;
408408
clocks = <&xtal>,
409-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
409+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
410410
<&clkc CLKID_FCLK_DIV4>,
411411
<&clkc CLKID_FCLK_DIV3>;
412412
#pwm-cells = <3>;
@@ -680,15 +680,15 @@
680680
&pwm_ab {
681681
compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
682682
clocks = <&xtal>,
683-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
683+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
684684
<&clkc CLKID_FCLK_DIV4>,
685685
<&clkc CLKID_FCLK_DIV3>;
686686
};
687687

688688
&pwm_cd {
689689
compatible = "amlogic,meson8b-pwm-v2", "amlogic,meson8-pwm-v2";
690690
clocks = <&xtal>,
691-
<>, /* unknown/untested, the datasheet calls it "Video PLL" */
691+
<0>, /* unknown/untested, the datasheet calls it "Video PLL" */
692692
<&clkc CLKID_FCLK_DIV4>,
693693
<&clkc CLKID_FCLK_DIV3>;
694694
};

arch/arm64/boot/dts/amazon/alpine-v2.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -151,7 +151,7 @@
151151
al,msi-num-spis = <160>;
152152
};
153153

154-
io-fabric@fc000000 {
154+
io-bus@fc000000 {
155155
compatible = "simple-bus";
156156
#address-cells = <1>;
157157
#size-cells = <1>;

arch/arm64/boot/dts/amazon/alpine-v3.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -361,7 +361,7 @@
361361
interrupt-parent = <&gic>;
362362
};
363363

364-
io-fabric@fc000000 {
364+
io-bus@fc000000 {
365365
compatible = "simple-bus";
366366
#address-cells = <1>;
367367
#size-cells = <1>;

arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2313,7 +2313,7 @@
23132313
"amlogic,meson8-pwm-v2";
23142314
reg = <0x0 0x19000 0x0 0x20>;
23152315
clocks = <&xtal>,
2316-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
2316+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
23172317
<&clkc CLKID_FCLK_DIV4>,
23182318
<&clkc CLKID_FCLK_DIV3>;
23192319
#pwm-cells = <3>;
@@ -2325,7 +2325,7 @@
23252325
"amlogic,meson8-pwm-v2";
23262326
reg = <0x0 0x1a000 0x0 0x20>;
23272327
clocks = <&xtal>,
2328-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
2328+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
23292329
<&clkc CLKID_FCLK_DIV4>,
23302330
<&clkc CLKID_FCLK_DIV3>;
23312331
#pwm-cells = <3>;
@@ -2337,7 +2337,7 @@
23372337
"amlogic,meson8-pwm-v2";
23382338
reg = <0x0 0x1b000 0x0 0x20>;
23392339
clocks = <&xtal>,
2340-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
2340+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
23412341
<&clkc CLKID_FCLK_DIV4>,
23422342
<&clkc CLKID_FCLK_DIV3>;
23432343
#pwm-cells = <3>;

arch/arm64/boot/dts/amlogic/meson-g12b-dreambox.dtsi

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -116,6 +116,10 @@
116116
status = "okay";
117117
};
118118

119+
&clkc_audio {
120+
status = "okay";
121+
};
122+
119123
&frddr_a {
120124
status = "okay";
121125
};

arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -741,7 +741,7 @@
741741

742742
&pwm_ab {
743743
clocks = <&xtal>,
744-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
744+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
745745
<&clkc CLKID_FCLK_DIV4>,
746746
<&clkc CLKID_FCLK_DIV3>;
747747
};
@@ -752,14 +752,14 @@
752752

753753
&pwm_cd {
754754
clocks = <&xtal>,
755-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
755+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
756756
<&clkc CLKID_FCLK_DIV4>,
757757
<&clkc CLKID_FCLK_DIV3>;
758758
};
759759

760760
&pwm_ef {
761761
clocks = <&xtal>,
762-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
762+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
763763
<&clkc CLKID_FCLK_DIV4>,
764764
<&clkc CLKID_FCLK_DIV3>;
765765
};

arch/arm64/boot/dts/amlogic/meson-gxl.dtsi

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -811,7 +811,7 @@
811811

812812
&pwm_ab {
813813
clocks = <&xtal>,
814-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
814+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
815815
<&clkc CLKID_FCLK_DIV4>,
816816
<&clkc CLKID_FCLK_DIV3>;
817817
};
@@ -822,14 +822,14 @@
822822

823823
&pwm_cd {
824824
clocks = <&xtal>,
825-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
825+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
826826
<&clkc CLKID_FCLK_DIV4>,
827827
<&clkc CLKID_FCLK_DIV3>;
828828
};
829829

830830
&pwm_ef {
831831
clocks = <&xtal>,
832-
<>, /* unknown/untested, the datasheet calls it "vid_pll" */
832+
<0>, /* unknown/untested, the datasheet calls it "vid_pll" */
833833
<&clkc CLKID_FCLK_DIV4>,
834834
<&clkc CLKID_FCLK_DIV3>;
835835
};

arch/arm64/boot/dts/apple/t8103-j293.dts

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,16 @@
7777
};
7878
};
7979

80+
/*
81+
* The driver depends on boot loader initialized state which resets when this
82+
* power-domain is powered off. This happens on suspend or when the driver is
83+
* missing during boot. Mark the domain as always on until the driver can
84+
* handle this.
85+
*/
86+
&ps_dispdfr_be {
87+
apple,always-on;
88+
};
89+
8090
&display_dfr {
8191
status = "okay";
8292
};

arch/arm64/boot/dts/apple/t8112-j493.dts

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,16 @@
4040
};
4141
};
4242

43+
/*
44+
* The driver depends on boot loader initialized state which resets when this
45+
* power-domain is powered off. This happens on suspend or when the driver is
46+
* missing during boot. Mark the domain as always on until the driver can
47+
* handle this.
48+
*/
49+
&ps_dispdfr_be {
50+
apple,always-on;
51+
};
52+
4353
&display_dfr {
4454
status = "okay";
4555
};

arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -88,3 +88,5 @@
8888
<0>, <0>, <400000000>,
8989
<1039500000>;
9090
};
91+
92+
/delete-node/ &{noc_opp_table/opp-1000000000};

arch/arm64/boot/dts/freescale/imx8mp-var-som.dtsi

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,6 @@
3535
<0x1 0x00000000 0 0xc0000000>;
3636
};
3737

38-
3938
reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
4039
compatible = "regulator-fixed";
4140
regulator-name = "VSD_3V3";
@@ -46,6 +45,16 @@
4645
startup-delay-us = <100>;
4746
off-on-delay-us = <12000>;
4847
};
48+
49+
reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {
50+
compatible = "regulator-gpio";
51+
regulator-name = "VSD_VSEL";
52+
regulator-min-microvolt = <1800000>;
53+
regulator-max-microvolt = <3300000>;
54+
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
55+
states = <3300000 0x0 1800000 0x1>;
56+
vin-supply = <&ldo5>;
57+
};
4958
};
5059

5160
&A53_0 {
@@ -205,6 +214,7 @@
205214
pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
206215
cd-gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
207216
vmmc-supply = <&reg_usdhc2_vmmc>;
217+
vqmmc-supply = <&reg_usdhc2_vqmmc>;
208218
bus-width = <4>;
209219
status = "okay";
210220
};

arch/arm64/boot/dts/freescale/imx8mp.dtsi

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1645,6 +1645,12 @@
16451645
opp-hz = /bits/ 64 <200000000>;
16461646
};
16471647

1648+
/* Nominal drive mode maximum */
1649+
opp-800000000 {
1650+
opp-hz = /bits/ 64 <800000000>;
1651+
};
1652+
1653+
/* Overdrive mode maximum */
16481654
opp-1000000000 {
16491655
opp-hz = /bits/ 64 <1000000000>;
16501656
};

arch/arm64/boot/dts/rockchip/px30-engicam-common.dtsi

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,15 +31,14 @@
3131
};
3232

3333
vcc3v3_btreg: vcc3v3-btreg {
34-
compatible = "regulator-gpio";
34+
compatible = "regulator-fixed";
3535
enable-active-high;
3636
pinctrl-names = "default";
3737
pinctrl-0 = <&bt_enable_h>;
3838
regulator-name = "btreg-gpio-supply";
3939
regulator-min-microvolt = <3300000>;
4040
regulator-max-microvolt = <3300000>;
4141
regulator-always-on;
42-
states = <3300000 0x0>;
4342
};
4443

4544
vcc3v3_rf_aux_mod: regulator-vcc3v3-rf-aux-mod {

arch/arm64/boot/dts/rockchip/px30-engicam-ctouch2.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,5 +26,5 @@
2626
};
2727

2828
&vcc3v3_btreg {
29-
enable-gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
29+
gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>;
3030
};

arch/arm64/boot/dts/rockchip/px30-engicam-px30-core-edimm2.2.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -39,5 +39,5 @@
3939
};
4040

4141
&vcc3v3_btreg {
42-
enable-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
42+
gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>;
4343
};

arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@
4343
sdio_pwrseq: sdio-pwrseq {
4444
compatible = "mmc-pwrseq-simple";
4545
clocks = <&rk808 1>;
46-
clock-names = "lpo";
46+
clock-names = "ext_clock";
4747
pinctrl-names = "default";
4848
pinctrl-0 = <&wifi_enable_h>;
4949
reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;

arch/arm64/boot/dts/rockchip/rk3566-bigtreetech-cb2.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -775,7 +775,7 @@
775775
rockchip,default-sample-phase = <90>;
776776
status = "okay";
777777

778-
sdio-wifi@1 {
778+
wifi@1 {
779779
compatible = "brcm,bcm4329-fmac";
780780
reg = <1>;
781781
interrupt-parent = <&gpio2>;

arch/arm64/boot/dts/rockchip/rk3568-qnap-ts433.dts

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -619,6 +619,8 @@
619619
bus-width = <8>;
620620
max-frequency = <200000000>;
621621
non-removable;
622+
pinctrl-names = "default";
623+
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>;
622624
status = "okay";
623625
};
624626

arch/arm64/boot/dts/rockchip/rk3576-armsom-sige5.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -610,7 +610,7 @@
610610
reg = <0x51>;
611611
clock-output-names = "hym8563";
612612
interrupt-parent = <&gpio0>;
613-
interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
613+
interrupts = <RK_PA0 IRQ_TYPE_LEVEL_LOW>;
614614
pinctrl-names = "default";
615615
pinctrl-0 = <&hym8563_int>;
616616
wakeup-source;

arch/arm64/boot/dts/rockchip/rk3588-friendlyelec-cm3588.dtsi

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -222,6 +222,10 @@
222222
compatible = "realtek,rt5616";
223223
reg = <0x1b>;
224224
#sound-dai-cells = <0>;
225+
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
226+
assigned-clock-rates = <12288000>;
227+
clocks = <&cru I2S0_8CH_MCLKOUT>;
228+
clock-names = "mclk";
225229
};
226230
};
227231

arch/arm64/boot/dts/rockchip/rk3588-turing-rk1.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -214,6 +214,8 @@
214214
};
215215

216216
&package_thermal {
217+
polling-delay = <1000>;
218+
217219
trips {
218220
package_active1: trip-active1 {
219221
temperature = <45000>;

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