@@ -107,6 +107,76 @@ ice_read_flat_nvm(struct ice_hw *hw, u32 offset, u32 *length, u8 *data,
107
107
return status ;
108
108
}
109
109
110
+ /**
111
+ * ice_aq_update_nvm
112
+ * @hw: pointer to the HW struct
113
+ * @module_typeid: module pointer location in words from the NVM beginning
114
+ * @offset: byte offset from the module beginning
115
+ * @length: length of the section to be written (in bytes from the offset)
116
+ * @data: command buffer (size [bytes] = length)
117
+ * @last_command: tells if this is the last command in a series
118
+ * @command_flags: command parameters
119
+ * @cd: pointer to command details structure or NULL
120
+ *
121
+ * Update the NVM using the admin queue commands (0x0703)
122
+ */
123
+ enum ice_status
124
+ ice_aq_update_nvm (struct ice_hw * hw , u16 module_typeid , u32 offset ,
125
+ u16 length , void * data , bool last_command , u8 command_flags ,
126
+ struct ice_sq_cd * cd )
127
+ {
128
+ struct ice_aq_desc desc ;
129
+ struct ice_aqc_nvm * cmd ;
130
+
131
+ cmd = & desc .params .nvm ;
132
+
133
+ /* In offset the highest byte must be zeroed. */
134
+ if (offset & 0xFF000000 )
135
+ return ICE_ERR_PARAM ;
136
+
137
+ ice_fill_dflt_direct_cmd_desc (& desc , ice_aqc_opc_nvm_write );
138
+
139
+ cmd -> cmd_flags |= command_flags ;
140
+
141
+ /* If this is the last command in a series, set the proper flag. */
142
+ if (last_command )
143
+ cmd -> cmd_flags |= ICE_AQC_NVM_LAST_CMD ;
144
+ cmd -> module_typeid = cpu_to_le16 (module_typeid );
145
+ cmd -> offset_low = cpu_to_le16 (offset & 0xFFFF );
146
+ cmd -> offset_high = (offset >> 16 ) & 0xFF ;
147
+ cmd -> length = cpu_to_le16 (length );
148
+
149
+ desc .flags |= cpu_to_le16 (ICE_AQ_FLAG_RD );
150
+
151
+ return ice_aq_send_cmd (hw , & desc , data , length , cd );
152
+ }
153
+
154
+ /**
155
+ * ice_aq_erase_nvm
156
+ * @hw: pointer to the HW struct
157
+ * @module_typeid: module pointer location in words from the NVM beginning
158
+ * @cd: pointer to command details structure or NULL
159
+ *
160
+ * Erase the NVM sector using the admin queue commands (0x0702)
161
+ */
162
+ enum ice_status
163
+ ice_aq_erase_nvm (struct ice_hw * hw , u16 module_typeid , struct ice_sq_cd * cd )
164
+ {
165
+ struct ice_aq_desc desc ;
166
+ struct ice_aqc_nvm * cmd ;
167
+
168
+ cmd = & desc .params .nvm ;
169
+
170
+ ice_fill_dflt_direct_cmd_desc (& desc , ice_aqc_opc_nvm_erase );
171
+
172
+ cmd -> module_typeid = cpu_to_le16 (module_typeid );
173
+ cmd -> length = cpu_to_le16 (ICE_AQC_NVM_ERASE_LEN );
174
+ cmd -> offset_low = 0 ;
175
+ cmd -> offset_high = 0 ;
176
+
177
+ return ice_aq_send_cmd (hw , & desc , NULL , 0 , cd );
178
+ }
179
+
110
180
/**
111
181
* ice_read_sr_word_aq - Reads Shadow RAM via AQ
112
182
* @hw: pointer to the HW structure
@@ -634,3 +704,119 @@ enum ice_status ice_nvm_validate_checksum(struct ice_hw *hw)
634
704
635
705
return status ;
636
706
}
707
+
708
+ /**
709
+ * ice_nvm_write_activate
710
+ * @hw: pointer to the HW struct
711
+ * @cmd_flags: NVM activate admin command bits (banks to be validated)
712
+ *
713
+ * Update the control word with the required banks' validity bits
714
+ * and dumps the Shadow RAM to flash (0x0707)
715
+ */
716
+ enum ice_status ice_nvm_write_activate (struct ice_hw * hw , u8 cmd_flags )
717
+ {
718
+ struct ice_aqc_nvm * cmd ;
719
+ struct ice_aq_desc desc ;
720
+
721
+ cmd = & desc .params .nvm ;
722
+ ice_fill_dflt_direct_cmd_desc (& desc , ice_aqc_opc_nvm_write_activate );
723
+
724
+ cmd -> cmd_flags = cmd_flags ;
725
+
726
+ return ice_aq_send_cmd (hw , & desc , NULL , 0 , NULL );
727
+ }
728
+
729
+ /**
730
+ * ice_aq_nvm_update_empr
731
+ * @hw: pointer to the HW struct
732
+ *
733
+ * Update empr (0x0709). This command allows SW to
734
+ * request an EMPR to activate new FW.
735
+ */
736
+ enum ice_status ice_aq_nvm_update_empr (struct ice_hw * hw )
737
+ {
738
+ struct ice_aq_desc desc ;
739
+
740
+ ice_fill_dflt_direct_cmd_desc (& desc , ice_aqc_opc_nvm_update_empr );
741
+
742
+ return ice_aq_send_cmd (hw , & desc , NULL , 0 , NULL );
743
+ }
744
+
745
+ /* ice_nvm_set_pkg_data
746
+ * @hw: pointer to the HW struct
747
+ * @del_pkg_data_flag: If is set then the current pkg_data store by FW
748
+ * is deleted.
749
+ * If bit is set to 1, then buffer should be size 0.
750
+ * @data: pointer to buffer
751
+ * @length: length of the buffer
752
+ * @cd: pointer to command details structure or NULL
753
+ *
754
+ * Set package data (0x070A). This command is equivalent to the reception
755
+ * of a PLDM FW Update GetPackageData cmd. This command should be sent
756
+ * as part of the NVM update as the first cmd in the flow.
757
+ */
758
+
759
+ enum ice_status
760
+ ice_nvm_set_pkg_data (struct ice_hw * hw , bool del_pkg_data_flag , u8 * data ,
761
+ u16 length , struct ice_sq_cd * cd )
762
+ {
763
+ struct ice_aqc_nvm_pkg_data * cmd ;
764
+ struct ice_aq_desc desc ;
765
+
766
+ if (length != 0 && !data )
767
+ return ICE_ERR_PARAM ;
768
+
769
+ cmd = & desc .params .pkg_data ;
770
+
771
+ ice_fill_dflt_direct_cmd_desc (& desc , ice_aqc_opc_nvm_pkg_data );
772
+ desc .flags |= cpu_to_le16 (ICE_AQ_FLAG_RD );
773
+
774
+ if (del_pkg_data_flag )
775
+ cmd -> cmd_flags |= ICE_AQC_NVM_PKG_DELETE ;
776
+
777
+ return ice_aq_send_cmd (hw , & desc , data , length , cd );
778
+ }
779
+
780
+ /* ice_nvm_pass_component_tbl
781
+ * @hw: pointer to the HW struct
782
+ * @data: pointer to buffer
783
+ * @length: length of the buffer
784
+ * @transfer_flag: parameter for determining stage of the update
785
+ * @comp_response: a pointer to the response from the 0x070B AQC.
786
+ * @comp_response_code: a pointer to the response code from the 0x070B AQC.
787
+ * @cd: pointer to command details structure or NULL
788
+ *
789
+ * Pass component table (0x070B). This command is equivalent to the reception
790
+ * of a PLDM FW Update PassComponentTable cmd. This command should be sent once
791
+ * per component. It can be only sent after Set Package Data cmd and before
792
+ * actual update. FW will assume these commands are going to be sent until
793
+ * the TransferFlag is set to End or StartAndEnd.
794
+ */
795
+
796
+ enum ice_status
797
+ ice_nvm_pass_component_tbl (struct ice_hw * hw , u8 * data , u16 length ,
798
+ u8 transfer_flag , u8 * comp_response ,
799
+ u8 * comp_response_code , struct ice_sq_cd * cd )
800
+ {
801
+ struct ice_aqc_nvm_pass_comp_tbl * cmd ;
802
+ struct ice_aq_desc desc ;
803
+ enum ice_status status ;
804
+
805
+ if (!data || !comp_response || !comp_response_code )
806
+ return ICE_ERR_PARAM ;
807
+
808
+ cmd = & desc .params .pass_comp_tbl ;
809
+
810
+ ice_fill_dflt_direct_cmd_desc (& desc ,
811
+ ice_aqc_opc_nvm_pass_component_tbl );
812
+ desc .flags |= cpu_to_le16 (ICE_AQ_FLAG_RD );
813
+
814
+ cmd -> transfer_flag = transfer_flag ;
815
+ status = ice_aq_send_cmd (hw , & desc , data , length , cd );
816
+
817
+ if (!status ) {
818
+ * comp_response = cmd -> component_response ;
819
+ * comp_response_code = cmd -> component_response_code ;
820
+ }
821
+ return status ;
822
+ }
0 commit comments