Skip to content

Commit a3c0880

Browse files
cjwinklhoferkrzk
authored andcommitted
w1: add UART w1 bus driver
Add a UART 1-Wire bus driver. The driver utilizes the UART interface via the Serial Device Bus to create the 1-Wire timing patterns. The driver was tested on a "Raspberry Pi 3B" with a DS18B20 and on a "Variscite DART-6UL" with a DS18S20 temperature sensor. The 1-Wire timing pattern and the corresponding UART baud-rate with the interpretation of the transferred bytes are described in the document: Link: https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html In short, the UART peripheral must support full-duplex and operate in open-drain mode. The timing patterns are generated by a specific combination of baud-rate and transmitted byte, which corresponds to a 1-Wire read bit, write bit or reset. Signed-off-by: Christoph Winklhofer <[email protected]> Link: https://lore.kernel.org/r/[email protected] [krzysztof: w1_uart_serdev_receive_buf() return type fixup] Signed-off-by: Krzysztof Kozlowski <[email protected]>
1 parent 23b3333 commit a3c0880

File tree

5 files changed

+481
-0
lines changed

5 files changed

+481
-0
lines changed

Documentation/w1/masters/index.rst

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,3 +12,4 @@
1212
mxc-w1
1313
omap-hdq
1414
w1-gpio
15+
w1-uart

Documentation/w1/masters/w1-uart.rst

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,54 @@
1+
.. SPDX-License-Identifier: GPL-2.0-or-later
2+
3+
=====================
4+
Kernel driver w1-uart
5+
=====================
6+
7+
Author: Christoph Winklhofer <[email protected]>
8+
9+
10+
Description
11+
-----------
12+
13+
UART 1-Wire bus driver. The driver utilizes the UART interface via the
14+
Serial Device Bus to create the 1-Wire timing patterns as described in
15+
the document `"Using a UART to Implement a 1-Wire Bus Master"`_.
16+
17+
.. _"Using a UART to Implement a 1-Wire Bus Master": https://www.analog.com/en/technical-articles/using-a-uart-to-implement-a-1wire-bus-master.html
18+
19+
In short, the UART peripheral must support full-duplex and operate in
20+
open-drain mode. The timing patterns are generated by a specific
21+
combination of baud-rate and transmitted byte, which corresponds to a
22+
1-Wire read bit, write bit or reset pulse.
23+
24+
For instance the timing pattern for a 1-Wire reset and presence detect uses
25+
the baud-rate 9600, i.e. 104.2 us per bit. The transmitted byte 0xf0 over
26+
UART (least significant bit first, start-bit low) sets the reset low time
27+
for 1-Wire to 521 us. A present 1-Wire device changes the received byte by
28+
pulling the line low, which is used by the driver to evaluate the result of
29+
the 1-Wire operation.
30+
31+
Similar for a 1-Wire read bit or write bit, which uses the baud-rate
32+
115200, i.e. 8.7 us per bit. The transmitted byte 0x80 is used for a
33+
Write-0 operation (low time 69.6us) and the byte 0xff for Read-0, Read-1
34+
and Write-1 (low time 8.7us).
35+
36+
The default baud-rate for reset and presence detection is 9600 and for
37+
a 1-Wire read or write operation 115200. In case the actual baud-rate
38+
is different from the requested one, the transmitted byte is adapted
39+
to generate the 1-Wire timing patterns.
40+
41+
42+
Usage
43+
-----
44+
45+
Specify the UART 1-wire bus in the device tree by adding the single child
46+
onewire to the serial node (e.g. uart0). For example:
47+
::
48+
49+
@uart0 {
50+
...
51+
onewire {
52+
compatible = "w1-uart";
53+
};
54+
};

drivers/w1/masters/Kconfig

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -78,5 +78,15 @@ config W1_MASTER_SGI
7878
This support is also available as a module. If so, the module
7979
will be called sgi_w1.
8080

81+
config W1_MASTER_UART
82+
tristate "UART 1-wire driver"
83+
depends on SERIAL_DEV_BUS
84+
help
85+
Say Y here if you want to communicate with your 1-wire devices using
86+
UART interface.
87+
88+
This support is also available as a module. If so, the module
89+
will be called w1-uart.
90+
8191
endmenu
8292

drivers/w1/masters/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,3 +12,4 @@ obj-$(CONFIG_W1_MASTER_MXC) += mxc_w1.o
1212
obj-$(CONFIG_W1_MASTER_GPIO) += w1-gpio.o
1313
obj-$(CONFIG_HDQ_MASTER_OMAP) += omap_hdq.o
1414
obj-$(CONFIG_W1_MASTER_SGI) += sgi_w1.o
15+
obj-$(CONFIG_W1_MASTER_UART) += w1-uart.o

0 commit comments

Comments
 (0)