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drm/i915/dp: Enable 3 DSC engines for 12 slices
Certain resolutions require 12 DSC slices support along with ultrajoiner. For such cases, the third DSC Engine per Pipe is enabled. Each DSC Engine processes 1 Slice, resulting in a total of 12 VDSC slices (4 Pipes * 3 DSC Instances per Pipe). Add support for 12 DSC slices and 3 DSC engines for such modes. v2: Add missing check for 3 slices support only with 4 joined pipes. (Suraj) Signed-off-by: Ankit Nautiyal <[email protected]> Reviewed-by: Suraj Kandpal <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/i915/display/intel_dp.c

Lines changed: 17 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -116,9 +116,12 @@ static const u8 valid_dsc_bpp[] = {6, 8, 10, 12, 15};
116116
* For now consider a max of 2 slices per line, which works for all platforms.
117117
* With this we can have max of 4 DSC Slices per pipe.
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*
119+
* For higher resolutions where 12 slice support is required with
120+
* ultrajoiner, only then each pipe can support 3 slices.
121+
*
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* #TODO Split this better to use 4 slices/dsc engine where supported.
120123
*/
121-
static const u8 valid_dsc_slicecount[] = {1, 2, 4};
124+
static const u8 valid_dsc_slicecount[] = {1, 2, 3, 4};
122125

123126
/**
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* intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
@@ -1026,6 +1029,13 @@ u8 intel_dp_dsc_get_slice_count(const struct intel_connector *connector,
10261029
for (i = 0; i < ARRAY_SIZE(valid_dsc_slicecount); i++) {
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u8 test_slice_count = valid_dsc_slicecount[i] * num_joined_pipes;
10281031

1032+
/*
1033+
* 3 DSC Slices per pipe need 3 DSC engines,
1034+
* which is supported only with Ultrajoiner.
1035+
*/
1036+
if (valid_dsc_slicecount[i] == 3 && num_joined_pipes != 4)
1037+
continue;
1038+
10291039
if (test_slice_count >
10301040
drm_dp_dsc_sink_max_slice_count(connector->dp.dsc_dpcd, false))
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break;
@@ -2414,8 +2424,13 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
24142424
* VDSC engine operates at 1 Pixel per clock, so if peak pixel rate
24152425
* is greater than the maximum Cdclock and if slice count is even
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* then we need to use 2 VDSC instances.
2427+
* In case of Ultrajoiner along with 12 slices we need to use 3
2428+
* VDSC instances.
24172429
*/
2418-
if (pipe_config->joiner_pipes || pipe_config->dsc.slice_count > 1)
2430+
if (pipe_config->joiner_pipes && num_joined_pipes == 4 &&
2431+
pipe_config->dsc.slice_count == 12)
2432+
pipe_config->dsc.num_streams = 3;
2433+
else if (pipe_config->joiner_pipes || pipe_config->dsc.slice_count > 1)
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pipe_config->dsc.num_streams = 2;
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else
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pipe_config->dsc.num_streams = 1;

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