Skip to content

Commit e8183fa

Browse files
tamng-amperewsakernel
authored andcommitted
i2c: designware: Disable TX_EMPTY irq while waiting for block length byte
During SMBus block data read process, we have seen high interrupt rate because of TX_EMPTY irq status while waiting for block length byte (the first data byte after the address phase). The interrupt handler does not do anything because the internal state is kept as STATUS_WRITE_IN_PROGRESS. Hence, we should disable TX_EMPTY IRQ until I2C DesignWare receives first data byte from I2C device, then re-enable it to resume SMBus transaction. It takes 0.789 ms for host to receive data length from slave. Without the patch, i2c_dw_isr() is called 99 times by TX_EMPTY interrupt. And it is none after applying the patch. Cc: [email protected] Co-developed-by: Chuong Tran <[email protected]> Signed-off-by: Chuong Tran <[email protected]> Signed-off-by: Tam Nguyen <[email protected]> Acked-by: Jarkko Nikula <[email protected]> Reviewed-by: Serge Semin <[email protected]> Signed-off-by: Wolfram Sang <[email protected]>
1 parent ba15a14 commit e8183fa

File tree

1 file changed

+16
-3
lines changed

1 file changed

+16
-3
lines changed

drivers/i2c/busses/i2c-designware-master.c

Lines changed: 16 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -519,10 +519,16 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
519519

520520
/*
521521
* Because we don't know the buffer length in the
522-
* I2C_FUNC_SMBUS_BLOCK_DATA case, we can't stop
523-
* the transaction here.
522+
* I2C_FUNC_SMBUS_BLOCK_DATA case, we can't stop the
523+
* transaction here. Also disable the TX_EMPTY IRQ
524+
* while waiting for the data length byte to avoid the
525+
* bogus interrupts flood.
524526
*/
525-
if (buf_len > 0 || flags & I2C_M_RECV_LEN) {
527+
if (flags & I2C_M_RECV_LEN) {
528+
dev->status |= STATUS_WRITE_IN_PROGRESS;
529+
intr_mask &= ~DW_IC_INTR_TX_EMPTY;
530+
break;
531+
} else if (buf_len > 0) {
526532
/* more bytes to be written */
527533
dev->status |= STATUS_WRITE_IN_PROGRESS;
528534
break;
@@ -558,6 +564,13 @@ i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len)
558564
msgs[dev->msg_read_idx].len = len;
559565
msgs[dev->msg_read_idx].flags &= ~I2C_M_RECV_LEN;
560566

567+
/*
568+
* Received buffer length, re-enable TX_EMPTY interrupt
569+
* to resume the SMBUS transaction.
570+
*/
571+
regmap_update_bits(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_TX_EMPTY,
572+
DW_IC_INTR_TX_EMPTY);
573+
561574
return len;
562575
}
563576

0 commit comments

Comments
 (0)