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drm/amdgpu/powerplay: check vrefresh when when changing displays
Compare the current vrefresh in addition to the number of displays when determining whether or not the smu needs updates when changing modes. The SMU needs to be updated if the vbi timeout changes due to a different refresh rate. Fixes flickering around mode changes in some cases on polaris parts. Reviewed-by: Rex Zhu <[email protected]> Reviewed-by: Huang Rui <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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+11
-1
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8 files changed

+11
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drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4132,6 +4132,9 @@ smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)
41324132
if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)
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is_update_required = true;
41344134

4135+
if (data->display_timing.vrefresh != hwmgr->display_config->vrefresh)
4136+
is_update_required = true;
4137+
41354138
if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) {
41364139
if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr &&
41374140
(data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK ||

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -156,6 +156,7 @@ struct smu7_vbios_boot_state {
156156
struct smu7_display_timing {
157157
uint32_t min_clock_in_sr;
158158
uint32_t num_existing_displays;
159+
uint32_t vrefresh;
159160
};
160161

161162
struct smu7_dpmlevel_enable_mask {

drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1231,6 +1231,7 @@ static int ci_populate_single_memory_level(
12311231
memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
12321232

12331233
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1234+
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
12341235

12351236
/* stutter mode not support on ci */
12361237

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1210,7 +1210,8 @@ static int fiji_populate_single_memory_level(struct pp_hwmgr *hwmgr,
12101210
* PECI_GetNumberOfActiveDisplays(hwmgr->pPECI,
12111211
* &(data->DisplayTiming.numExistingDisplays));
12121212
*/
1213-
data->display_timing.num_existing_displays = 1;
1213+
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1214+
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
12141215

12151216
if (mclk_stutter_mode_threshold &&
12161217
(clock <= mclk_stutter_mode_threshold) &&

drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1280,6 +1280,7 @@ static int iceland_populate_single_memory_level(
12801280
memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
12811281

12821282
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1283+
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
12831284

12841285
/* stutter mode not support on iceland */
12851286

drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1103,6 +1103,7 @@ static int polaris10_populate_single_memory_level(struct pp_hwmgr *hwmgr,
11031103
mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
11041104

11051105
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1106+
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
11061107

11071108
if (mclk_stutter_mode_threshold &&
11081109
(clock <= mclk_stutter_mode_threshold) &&

drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1004,6 +1004,7 @@ static int tonga_populate_single_memory_level(
10041004
memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
10051005

10061006
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1007+
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
10071008

10081009
if ((mclk_stutter_mode_threshold != 0) &&
10091010
(memory_clock <= mclk_stutter_mode_threshold) &&

drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1009,6 +1009,7 @@ static int vegam_populate_single_memory_level(struct pp_hwmgr *hwmgr,
10091009
mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
10101010

10111011
data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
1012+
data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
10121013

10131014
if (mclk_stutter_mode_threshold &&
10141015
(clock <= mclk_stutter_mode_threshold) &&

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