@@ -63,7 +63,7 @@ static int bnxt_ptp_settime(struct ptp_clock_info *ptp_info,
63
63
ptp_info );
64
64
u64 ns = timespec64_to_ns (ts );
65
65
66
- if (ptp -> bp -> fw_cap & BNXT_FW_CAP_PTP_RTC )
66
+ if (BNXT_PTP_USE_RTC ( ptp -> bp ) )
67
67
return bnxt_ptp_cfg_settime (ptp -> bp , ns );
68
68
69
69
spin_lock_bh (& ptp -> ptp_lock );
@@ -196,7 +196,7 @@ static int bnxt_ptp_adjtime(struct ptp_clock_info *ptp_info, s64 delta)
196
196
struct bnxt_ptp_cfg * ptp = container_of (ptp_info , struct bnxt_ptp_cfg ,
197
197
ptp_info );
198
198
199
- if (ptp -> bp -> fw_cap & BNXT_FW_CAP_PTP_RTC )
199
+ if (BNXT_PTP_USE_RTC ( ptp -> bp ) )
200
200
return bnxt_ptp_adjphc (ptp , delta );
201
201
202
202
spin_lock_bh (& ptp -> ptp_lock );
@@ -205,34 +205,39 @@ static int bnxt_ptp_adjtime(struct ptp_clock_info *ptp_info, s64 delta)
205
205
return 0 ;
206
206
}
207
207
208
+ static int bnxt_ptp_adjfine_rtc (struct bnxt * bp , long scaled_ppm )
209
+ {
210
+ s32 ppb = scaled_ppm_to_ppb (scaled_ppm );
211
+ struct hwrm_port_mac_cfg_input * req ;
212
+ int rc ;
213
+
214
+ rc = hwrm_req_init (bp , req , HWRM_PORT_MAC_CFG );
215
+ if (rc )
216
+ return rc ;
217
+
218
+ req -> ptp_freq_adj_ppb = cpu_to_le32 (ppb );
219
+ req -> enables = cpu_to_le32 (PORT_MAC_CFG_REQ_ENABLES_PTP_FREQ_ADJ_PPB );
220
+ rc = hwrm_req_send (bp , req );
221
+ if (rc )
222
+ netdev_err (bp -> dev ,
223
+ "ptp adjfine failed. rc = %d\n" , rc );
224
+ return rc ;
225
+ }
226
+
208
227
static int bnxt_ptp_adjfine (struct ptp_clock_info * ptp_info , long scaled_ppm )
209
228
{
210
229
struct bnxt_ptp_cfg * ptp = container_of (ptp_info , struct bnxt_ptp_cfg ,
211
230
ptp_info );
212
- struct hwrm_port_mac_cfg_input * req ;
213
231
struct bnxt * bp = ptp -> bp ;
214
- int rc = 0 ;
215
232
216
- if (!(ptp -> bp -> fw_cap & BNXT_FW_CAP_PTP_RTC )) {
217
- spin_lock_bh (& ptp -> ptp_lock );
218
- timecounter_read (& ptp -> tc );
219
- ptp -> cc .mult = adjust_by_scaled_ppm (ptp -> cmult , scaled_ppm );
220
- spin_unlock_bh (& ptp -> ptp_lock );
221
- } else {
222
- s32 ppb = scaled_ppm_to_ppb (scaled_ppm );
223
-
224
- rc = hwrm_req_init (bp , req , HWRM_PORT_MAC_CFG );
225
- if (rc )
226
- return rc ;
233
+ if (BNXT_PTP_USE_RTC (bp ))
234
+ return bnxt_ptp_adjfine_rtc (bp , scaled_ppm );
227
235
228
- req -> ptp_freq_adj_ppb = cpu_to_le32 (ppb );
229
- req -> enables = cpu_to_le32 (PORT_MAC_CFG_REQ_ENABLES_PTP_FREQ_ADJ_PPB );
230
- rc = hwrm_req_send (ptp -> bp , req );
231
- if (rc )
232
- netdev_err (ptp -> bp -> dev ,
233
- "ptp adjfine failed. rc = %d\n" , rc );
234
- }
235
- return rc ;
236
+ spin_lock_bh (& ptp -> ptp_lock );
237
+ timecounter_read (& ptp -> tc );
238
+ ptp -> cc .mult = adjust_by_scaled_ppm (ptp -> cmult , scaled_ppm );
239
+ spin_unlock_bh (& ptp -> ptp_lock );
240
+ return 0 ;
236
241
}
237
242
238
243
void bnxt_ptp_pps_event (struct bnxt * bp , u32 data1 , u32 data2 )
@@ -879,7 +884,7 @@ int bnxt_ptp_init_rtc(struct bnxt *bp, bool phc_cfg)
879
884
u64 ns ;
880
885
int rc ;
881
886
882
- if (!bp -> ptp_cfg || !(bp -> fw_cap & BNXT_FW_CAP_PTP_RTC ))
887
+ if (!bp -> ptp_cfg || !BNXT_PTP_USE_RTC (bp ))
883
888
return - ENODEV ;
884
889
885
890
if (!phc_cfg ) {
@@ -932,13 +937,14 @@ int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg)
932
937
atomic_set (& ptp -> tx_avail , BNXT_MAX_TX_TS );
933
938
spin_lock_init (& ptp -> ptp_lock );
934
939
935
- if (bp -> fw_cap & BNXT_FW_CAP_PTP_RTC ) {
940
+ if (BNXT_PTP_USE_RTC ( bp ) ) {
936
941
bnxt_ptp_timecounter_init (bp , false);
937
942
rc = bnxt_ptp_init_rtc (bp , phc_cfg );
938
943
if (rc )
939
944
goto out ;
940
945
} else {
941
946
bnxt_ptp_timecounter_init (bp , true);
947
+ bnxt_ptp_adjfine_rtc (bp , 0 );
942
948
}
943
949
944
950
ptp -> ptp_info = bnxt_ptp_caps ;
0 commit comments