@@ -1065,23 +1065,18 @@ static void airoha_qdma_cleanup_tx_queue(struct airoha_queue *q)
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static int airoha_qdma_init_hfwd_queues (struct airoha_qdma * qdma )
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{
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+ int size , index , num_desc = HW_DSCP_NUM ;
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struct airoha_eth * eth = qdma -> eth ;
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int id = qdma - & eth -> qdma [0 ];
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+ u32 status , buf_size ;
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dma_addr_t dma_addr ;
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const char * name ;
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- int size , index ;
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- u32 status ;
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-
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- size = HW_DSCP_NUM * sizeof (struct airoha_qdma_fwd_desc );
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- if (!dmam_alloc_coherent (eth -> dev , size , & dma_addr , GFP_KERNEL ))
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- return - ENOMEM ;
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-
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- airoha_qdma_wr (qdma , REG_FWD_DSCP_BASE , dma_addr );
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name = devm_kasprintf (eth -> dev , GFP_KERNEL , "qdma%d-buf" , id );
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if (!name )
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return - ENOMEM ;
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+ buf_size = id ? AIROHA_MAX_PACKET_SIZE / 2 : AIROHA_MAX_PACKET_SIZE ;
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index = of_property_match_string (eth -> dev -> of_node ,
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"memory-region-names" , name );
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if (index >= 0 ) {
@@ -1099,24 +1094,34 @@ static int airoha_qdma_init_hfwd_queues(struct airoha_qdma *qdma)
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rmem = of_reserved_mem_lookup (np );
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of_node_put (np );
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dma_addr = rmem -> base ;
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+ /* Compute the number of hw descriptors according to the
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+ * reserved memory size and the payload buffer size
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+ */
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+ num_desc = div_u64 (rmem -> size , buf_size );
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} else {
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- size = AIROHA_MAX_PACKET_SIZE * HW_DSCP_NUM ;
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+ size = buf_size * num_desc ;
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if (!dmam_alloc_coherent (eth -> dev , size , & dma_addr ,
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GFP_KERNEL ))
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return - ENOMEM ;
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}
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airoha_qdma_wr (qdma , REG_FWD_BUF_BASE , dma_addr );
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+ size = num_desc * sizeof (struct airoha_qdma_fwd_desc );
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+ if (!dmam_alloc_coherent (eth -> dev , size , & dma_addr , GFP_KERNEL ))
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+ return - ENOMEM ;
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+
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+ airoha_qdma_wr (qdma , REG_FWD_DSCP_BASE , dma_addr );
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+ /* QDMA0: 2KB. QDMA1: 1KB */
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airoha_qdma_rmw (qdma , REG_HW_FWD_DSCP_CFG ,
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HW_FWD_DSCP_PAYLOAD_SIZE_MASK ,
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- FIELD_PREP (HW_FWD_DSCP_PAYLOAD_SIZE_MASK , 0 ));
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+ FIELD_PREP (HW_FWD_DSCP_PAYLOAD_SIZE_MASK , !! id ));
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airoha_qdma_rmw (qdma , REG_FWD_DSCP_LOW_THR , FWD_DSCP_LOW_THR_MASK ,
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FIELD_PREP (FWD_DSCP_LOW_THR_MASK , 128 ));
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airoha_qdma_rmw (qdma , REG_LMGR_INIT_CFG ,
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LMGR_INIT_START | LMGR_SRAM_MODE_MASK |
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HW_FWD_DESC_NUM_MASK ,
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- FIELD_PREP (HW_FWD_DESC_NUM_MASK , HW_DSCP_NUM ) |
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+ FIELD_PREP (HW_FWD_DESC_NUM_MASK , num_desc ) |
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LMGR_INIT_START | LMGR_SRAM_MODE_MASK );
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return read_poll_timeout (airoha_qdma_rr , status ,
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