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Merge ra.kernel.org:/pub/scm/linux/kernel/git/netdev/net
Some of the devlink bits were tricky, but I think I got it right. Signed-off-by: David S. Miller <[email protected]>
2 parents 84cb1b5 + ec35307 commit 675f176

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‎.mailmap

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@@ -25,6 +25,8 @@ Aleksey Gorelov <[email protected]>
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Alexander Lobakin <[email protected]> <[email protected]>
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Alexander Lobakin <[email protected]> <[email protected]>
2727
Alexander Lobakin <[email protected]> <[email protected]>
28+
Alexander Mikhalitsyn <[email protected]> <[email protected]>
29+
Alexander Mikhalitsyn <[email protected]> <[email protected]>
2830
Alexandre Belloni <[email protected]> <[email protected]>
2931
Alexei Starovoitov <[email protected]> <[email protected]>
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Alexei Starovoitov <[email protected]> <[email protected]>

‎Documentation/admin-guide/hw-vuln/cross-thread-rsb.rst

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.. SPDX-License-Identifier: GPL-2.0
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Cross-Thread Return Address Predictions
5+
=======================================
6+
7+
Certain AMD and Hygon processors are subject to a cross-thread return address
8+
predictions vulnerability. When running in SMT mode and one sibling thread
9+
transitions out of C0 state, the other sibling thread could use return target
10+
predictions from the sibling thread that transitioned out of C0.
11+
12+
The Spectre v2 mitigations protect the Linux kernel, as it fills the return
13+
address prediction entries with safe targets when context switching to the idle
14+
thread. However, KVM does allow a VMM to prevent exiting guest mode when
15+
transitioning out of C0. This could result in a guest-controlled return target
16+
being consumed by the sibling thread.
17+
18+
Affected processors
19+
-------------------
20+
21+
The following CPUs are vulnerable:
22+
23+
- AMD Family 17h processors
24+
- Hygon Family 18h processors
25+
26+
Related CVEs
27+
------------
28+
29+
The following CVE entry is related to this issue:
30+
31+
============== =======================================
32+
CVE-2022-27672 Cross-Thread Return Address Predictions
33+
============== =======================================
34+
35+
Problem
36+
-------
37+
38+
Affected SMT-capable processors support 1T and 2T modes of execution when SMT
39+
is enabled. In 2T mode, both threads in a core are executing code. For the
40+
processor core to enter 1T mode, it is required that one of the threads
41+
requests to transition out of the C0 state. This can be communicated with the
42+
HLT instruction or with an MWAIT instruction that requests non-C0.
43+
When the thread re-enters the C0 state, the processor transitions back
44+
to 2T mode, assuming the other thread is also still in C0 state.
45+
46+
In affected processors, the return address predictor (RAP) is partitioned
47+
depending on the SMT mode. For instance, in 2T mode each thread uses a private
48+
16-entry RAP, but in 1T mode, the active thread uses a 32-entry RAP. Upon
49+
transition between 1T/2T mode, the RAP contents are not modified but the RAP
50+
pointers (which control the next return target to use for predictions) may
51+
change. This behavior may result in return targets from one SMT thread being
52+
used by RET predictions in the sibling thread following a 1T/2T switch. In
53+
particular, a RET instruction executed immediately after a transition to 1T may
54+
use a return target from the thread that just became idle. In theory, this
55+
could lead to information disclosure if the return targets used do not come
56+
from trustworthy code.
57+
58+
Attack scenarios
59+
----------------
60+
61+
An attack can be mounted on affected processors by performing a series of CALL
62+
instructions with targeted return locations and then transitioning out of C0
63+
state.
64+
65+
Mitigation mechanism
66+
--------------------
67+
68+
Before entering idle state, the kernel context switches to the idle thread. The
69+
context switch fills the RAP entries (referred to as the RSB in Linux) with safe
70+
targets by performing a sequence of CALL instructions.
71+
72+
Prevent a guest VM from directly putting the processor into an idle state by
73+
intercepting HLT and MWAIT instructions.
74+
75+
Both mitigations are required to fully address this issue.
76+
77+
Mitigation control on the kernel command line
78+
---------------------------------------------
79+
80+
Use existing Spectre v2 mitigations that will fill the RSB on context switch.
81+
82+
Mitigation control for KVM - module parameter
83+
---------------------------------------------
84+
85+
By default, the KVM hypervisor mitigates this issue by intercepting guest
86+
attempts to transition out of C0. A VMM can use the KVM_CAP_X86_DISABLE_EXITS
87+
capability to override those interceptions, but since this is not common, the
88+
mitigation that covers this path is not enabled by default.
89+
90+
The mitigation for the KVM_CAP_X86_DISABLE_EXITS capability can be turned on
91+
using the boolean module parameter mitigate_smt_rsb, e.g.:
92+
kvm.mitigate_smt_rsb=1

‎Documentation/admin-guide/hw-vuln/index.rst

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@@ -18,3 +18,4 @@ are configurable at compile, boot or run time.
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core-scheduling.rst
1919
l1d_flush.rst
2020
processor_mmio_stale_data.rst
21+
cross-thread-rsb.rst

‎MAINTAINERS

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@@ -16135,15 +16135,15 @@ F: drivers/pci/controller/pci-v3-semi.c
1613516135

1613616136
PCI ENDPOINT SUBSYSTEM
1613716137
M: Lorenzo Pieralisi <[email protected]>
16138-
R: Krzysztof Wilczyński <[email protected]>
16138+
M: Krzysztof Wilczyński <[email protected]>
1613916139
R: Manivannan Sadhasivam <[email protected]>
1614016140
R: Kishon Vijay Abraham I <[email protected]>
1614116141
L: [email protected]
1614216142
S: Supported
1614316143
Q: https://patchwork.kernel.org/project/linux-pci/list/
1614416144
B: https://bugzilla.kernel.org
1614516145
C: irc://irc.oftc.net/linux-pci
16146-
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git
16146+
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git
1614716147
F: Documentation/PCI/endpoint/*
1614816148
F: Documentation/misc-devices/pci-endpoint-test.rst
1614916149
F: drivers/misc/pci_endpoint_test.c
@@ -16178,7 +16178,7 @@ S: Supported
1617816178
Q: https://patchwork.kernel.org/project/linux-pci/list/
1617916179
B: https://bugzilla.kernel.org
1618016180
C: irc://irc.oftc.net/linux-pci
16181-
T: git git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
16181+
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git
1618216182
F: Documentation/driver-api/pci/p2pdma.rst
1618316183
F: drivers/pci/p2pdma.c
1618416184
F: include/linux/pci-p2pdma.h
@@ -16200,14 +16200,14 @@ F: drivers/pci/controller/pci-xgene-msi.c
1620016200

1620116201
PCI NATIVE HOST BRIDGE AND ENDPOINT DRIVERS
1620216202
M: Lorenzo Pieralisi <[email protected]>
16203+
M: Krzysztof Wilczyński <[email protected]>
1620316204
R: Rob Herring <[email protected]>
16204-
R: Krzysztof Wilczyński <[email protected]>
1620516205
L: [email protected]
1620616206
S: Supported
1620716207
Q: https://patchwork.kernel.org/project/linux-pci/list/
1620816208
B: https://bugzilla.kernel.org
1620916209
C: irc://irc.oftc.net/linux-pci
16210-
T: git git://git.kernel.org/pub/scm/linux/kernel/git/lpieralisi/pci.git
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git
1621116211
F: Documentation/devicetree/bindings/pci/
1621216212
F: drivers/pci/controller/
1621316213
F: drivers/pci/pci-bridge-emul.c
@@ -16220,7 +16220,7 @@ S: Supported
1622016220
Q: https://patchwork.kernel.org/project/linux-pci/list/
1622116221
B: https://bugzilla.kernel.org
1622216222
C: irc://irc.oftc.net/linux-pci
16223-
T: git git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci.git
16223+
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git
1622416224
F: Documentation/PCI/
1622516225
F: Documentation/devicetree/bindings/pci/
1622616226
F: arch/x86/kernel/early-quirks.c
@@ -20120,6 +20120,7 @@ F: drivers/watchdog/sunplus_wdt.c
2012020120
SUPERH
2012120121
M: Yoshinori Sato <[email protected]>
2012220122
M: Rich Felker <[email protected]>
20123+
M: John Paul Adrian Glaubitz <[email protected]>
2012320124
L: [email protected]
2012420125
S: Maintained
2012520126
Q: http://patchwork.kernel.org/project/linux-sh/list/
@@ -20352,8 +20353,7 @@ S: Maintained
2035220353
F: drivers/platform/x86/system76_acpi.c
2035320354

2035420355
SYSV FILESYSTEM
20355-
M: Christoph Hellwig <[email protected]>
20356-
S: Maintained
20356+
S: Orphan
2035720357
F: Documentation/filesystems/sysv-fs.rst
2035820358
F: fs/sysv/
2035920359
F: include/linux/sysv_fs.h
@@ -21848,11 +21848,9 @@ W: http://en.wikipedia.org/wiki/Util-linux
2184821848
T: git git://git.kernel.org/pub/scm/utils/util-linux/util-linux.git
2184921849

2185021850
UUID HELPERS
21851-
M: Christoph Hellwig <[email protected]>
2185221851
R: Andy Shevchenko <[email protected]>
2185321852
L: [email protected]
2185421853
S: Maintained
21855-
T: git git://git.infradead.org/users/hch/uuid.git
2185621854
F: include/linux/uuid.h
2185721855
F: include/uapi/linux/uuid.h
2185821856
F: lib/test_uuid.c

‎Makefile

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@@ -2,7 +2,7 @@
22
VERSION = 6
33
PATCHLEVEL = 2
44
SUBLEVEL = 0
5-
EXTRAVERSION = -rc7
5+
EXTRAVERSION = -rc8
66
NAME = Hurr durr I'ma ninja sloth
77

88
# *DOCUMENTATION*

‎arch/arm/boot/dts/rk3288.dtsi

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11811181
clock-names = "dp", "pclk";
11821182
phys = <&edp_phy>;
11831183
phy-names = "dp";
1184+
power-domains = <&power RK3288_PD_VIO>;
11841185
resets = <&cru SRST_EDP>;
11851186
reset-names = "dp";
11861187
rockchip,grf = <&grf>;

‎arch/arm/boot/dts/stihxxx-b2120.dtsi

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178178
tsin-num = <0>;
179179
serial-not-parallel;
180180
i2c-bus = <&ssc2>;
181-
reset-gpios = <&pio15 4 GPIO_ACTIVE_HIGH>;
181+
reset-gpios = <&pio15 4 GPIO_ACTIVE_LOW>;
182182
dvb-card = <STV0367_TDA18212_NIMA_1>;
183183
};
184184
};

‎arch/arm64/boot/dts/amlogic/meson-axg.dtsi

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18861886
sd_emmc_b: sd@5000 {
18871887
compatible = "amlogic,meson-axg-mmc";
18881888
reg = <0x0 0x5000 0x0 0x800>;
1889-
interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
1889+
interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
18901890
status = "disabled";
18911891
clocks = <&clkc CLKID_SD_EMMC_B>,
18921892
<&clkc CLKID_SD_EMMC_B_CLK0>,
@@ -1898,7 +1898,7 @@
18981898
sd_emmc_c: mmc@7000 {
18991899
compatible = "amlogic,meson-axg-mmc";
19001900
reg = <0x0 0x7000 0x0 0x800>;
1901-
interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
1901+
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
19021902
status = "disabled";
19031903
clocks = <&clkc CLKID_SD_EMMC_C>,
19041904
<&clkc CLKID_SD_EMMC_C_CLK0>,

‎arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi

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@@ -2324,7 +2324,7 @@
23242324
sd_emmc_a: sd@ffe03000 {
23252325
compatible = "amlogic,meson-axg-mmc";
23262326
reg = <0x0 0xffe03000 0x0 0x800>;
2327-
interrupts = <GIC_SPI 189 IRQ_TYPE_EDGE_RISING>;
2327+
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
23282328
status = "disabled";
23292329
clocks = <&clkc CLKID_SD_EMMC_A>,
23302330
<&clkc CLKID_SD_EMMC_A_CLK0>,
@@ -2336,7 +2336,7 @@
23362336
sd_emmc_b: sd@ffe05000 {
23372337
compatible = "amlogic,meson-axg-mmc";
23382338
reg = <0x0 0xffe05000 0x0 0x800>;
2339-
interrupts = <GIC_SPI 190 IRQ_TYPE_EDGE_RISING>;
2339+
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
23402340
status = "disabled";
23412341
clocks = <&clkc CLKID_SD_EMMC_B>,
23422342
<&clkc CLKID_SD_EMMC_B_CLK0>,
@@ -2348,7 +2348,7 @@
23482348
sd_emmc_c: mmc@ffe07000 {
23492349
compatible = "amlogic,meson-axg-mmc";
23502350
reg = <0x0 0xffe07000 0x0 0x800>;
2351-
interrupts = <GIC_SPI 191 IRQ_TYPE_EDGE_RISING>;
2351+
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
23522352
status = "disabled";
23532353
clocks = <&clkc CLKID_SD_EMMC_C>,
23542354
<&clkc CLKID_SD_EMMC_C_CLK0>,

‎arch/arm64/boot/dts/amlogic/meson-gx.dtsi

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603603
sd_emmc_a: mmc@70000 {
604604
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
605605
reg = <0x0 0x70000 0x0 0x800>;
606-
interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
606+
interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
607607
status = "disabled";
608608
};
609609

610610
sd_emmc_b: mmc@72000 {
611611
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
612612
reg = <0x0 0x72000 0x0 0x800>;
613-
interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
613+
interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
614614
status = "disabled";
615615
};
616616

617617
sd_emmc_c: mmc@74000 {
618618
compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
619619
reg = <0x0 0x74000 0x0 0x800>;
620-
interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
620+
interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
621621
status = "disabled";
622622
};
623623
};

‎arch/arm64/boot/dts/mediatek/mt8195.dtsi

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@@ -2146,7 +2146,7 @@
21462146
};
21472147

21482148
vdosys0: syscon@1c01a000 {
2149-
compatible = "mediatek,mt8195-mmsys", "syscon";
2149+
compatible = "mediatek,mt8195-vdosys0", "mediatek,mt8195-mmsys", "syscon";
21502150
reg = <0 0x1c01a000 0 0x1000>;
21512151
mboxes = <&gce0 0 CMDQ_THR_PRIO_4>;
21522152
#clock-cells = <1>;
@@ -2292,7 +2292,7 @@
22922292
};
22932293

22942294
vdosys1: syscon@1c100000 {
2295-
compatible = "mediatek,mt8195-mmsys", "syscon";
2295+
compatible = "mediatek,mt8195-vdosys1", "syscon";
22962296
reg = <0 0x1c100000 0 0x1000>;
22972297
#clock-cells = <1>;
22982298
};

‎arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts

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@@ -96,15 +96,13 @@
9696
linux,default-trigger = "heartbeat";
9797
gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
9898
default-state = "on";
99-
mode = <0x23>;
10099
};
101100

102101
user_led: led-1 {
103102
label = "firefly:yellow:user";
104103
linux,default-trigger = "mmc1";
105104
gpios = <&rk805 0 GPIO_ACTIVE_LOW>;
106105
default-state = "off";
107-
mode = <0x05>;
108106
};
109107
};
110108
};

‎arch/arm64/boot/dts/rockchip/rk3399-op1-opp.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -111,7 +111,7 @@
111111
};
112112
};
113113

114-
dmc_opp_table: dmc_opp_table {
114+
dmc_opp_table: opp-table-3 {
115115
compatible = "operating-points-v2";
116116

117117
opp00 {

‎arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts

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Original file line numberDiff line numberDiff line change
@@ -104,6 +104,13 @@
104104
};
105105
};
106106

107+
&cpu_alert0 {
108+
temperature = <65000>;
109+
};
110+
&cpu_alert1 {
111+
temperature = <68000>;
112+
};
113+
107114
&cpu_l0 {
108115
cpu-supply = <&vdd_cpu_l>;
109116
};

‎arch/arm64/boot/dts/rockchip/rk3399.dtsi

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -589,7 +589,7 @@
589589
clocks = <&cru HCLK_M_CRYPTO0>, <&cru HCLK_S_CRYPTO0>, <&cru SCLK_CRYPTO0>;
590590
clock-names = "hclk_master", "hclk_slave", "sclk";
591591
resets = <&cru SRST_CRYPTO0>, <&cru SRST_CRYPTO0_S>, <&cru SRST_CRYPTO0_M>;
592-
reset-names = "master", "lave", "crypto";
592+
reset-names = "master", "slave", "crypto-rst";
593593
};
594594

595595
crypto1: crypto@ff8b8000 {
@@ -599,7 +599,7 @@
599599
clocks = <&cru HCLK_M_CRYPTO1>, <&cru HCLK_S_CRYPTO1>, <&cru SCLK_CRYPTO1>;
600600
clock-names = "hclk_master", "hclk_slave", "sclk";
601601
resets = <&cru SRST_CRYPTO1>, <&cru SRST_CRYPTO1_S>, <&cru SRST_CRYPTO1_M>;
602-
reset-names = "master", "slave", "crypto";
602+
reset-names = "master", "slave", "crypto-rst";
603603
};
604604

605605
i2c1: i2c@ff110000 {
@@ -2241,13 +2241,11 @@
22412241
pcfg_input_pull_up: pcfg-input-pull-up {
22422242
input-enable;
22432243
bias-pull-up;
2244-
drive-strength = <2>;
22452244
};
22462245

22472246
pcfg_input_pull_down: pcfg-input-pull-down {
22482247
input-enable;
22492248
bias-pull-down;
2250-
drive-strength = <2>;
22512249
};
22522250

22532251
clock {

‎arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -353,6 +353,17 @@
353353
};
354354
};
355355

356+
&pmu_io_domains {
357+
pmuio2-supply = <&vcc_3v3>;
358+
vccio1-supply = <&vcc_3v3>;
359+
vccio3-supply = <&vcc_3v3>;
360+
vccio4-supply = <&vcca_1v8>;
361+
vccio5-supply = <&vcc_3v3>;
362+
vccio6-supply = <&vcca_1v8>;
363+
vccio7-supply = <&vcc_3v3>;
364+
status = "okay";
365+
};
366+
356367
&pwm0 {
357368
status = "okay";
358369
};

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