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Alex Elderkuba-moo
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net: ipa: update gsi registers for IPA v4.5
Very few GSI register definitions change for IPA v4.5, however as a group their position in memory shifts a constant amount (handled by the next commit). Add definitions and update comments to the set of GSI registers to support changes that come with IPA v4.5. Update the logic in gsi_channel_program() to accommodate the new (expanded) PREFETCH_MODE field in the CH_C_QOS register. Signed-off-by: Alex Elder <[email protected]> Signed-off-by: Jakub Kicinski <[email protected]>
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drivers/net/ipa/gsi.c

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -784,8 +784,14 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell)
784784
/* v4.0 introduces an escape buffer for prefetch. We use it
785785
* on all but the AP command channel.
786786
*/
787-
if (gsi->version != IPA_VERSION_3_5_1 && !channel->command)
788-
val |= USE_ESCAPE_BUF_ONLY_FMASK;
787+
if (gsi->version != IPA_VERSION_3_5_1 && !channel->command) {
788+
/* If not otherwise set, prefetch buffers are used */
789+
if (gsi->version < IPA_VERSION_4_5)
790+
val |= USE_ESCAPE_BUF_ONLY_FMASK;
791+
else
792+
val |= u32_encode_bits(GSI_ESCAPE_BUF_ONLY,
793+
PREFETCH_MODE_FMASK);
794+
}
789795

790796
iowrite32(val, gsi->virt + GSI_CH_C_QOS_OFFSET(channel_id));
791797

drivers/net/ipa/gsi_reg.h

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,16 @@ enum gsi_channel_type {
105105
#define USE_DB_ENG_FMASK GENMASK(9, 9)
106106
/* The next field is only present for IPA v4.0, v4.1, and v4.2 */
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#define USE_ESCAPE_BUF_ONLY_FMASK GENMASK(10, 10)
108+
/* The next two fields are present for IPA v4.5 and above */
109+
#define PREFETCH_MODE_FMASK GENMASK(13, 10)
110+
#define EMPTY_LVL_THRSHOLD_FMASK GENMASK(23, 16)
111+
/** enum gsi_prefetch_mode - PREFETCH_MODE field in CH_C_QOS */
112+
enum gsi_prefetch_mode {
113+
GSI_USE_PREFETCH_BUFS = 0x0,
114+
GSI_ESCAPE_BUF_ONLY = 0x1,
115+
GSI_SMART_PREFETCH = 0x2,
116+
GSI_FREE_PREFETCH = 0x3,
117+
};
108118

109119
#define GSI_CH_C_SCRATCH_0_OFFSET(ch) \
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GSI_EE_N_CH_C_SCRATCH_0_OFFSET((ch), GSI_EE_AP)
@@ -287,6 +297,9 @@ enum gsi_iram_size {
287297
/* The next two values are available for IPA v4.0 and above */
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IRAM_SIZE_TWO_N_HALF_KB = 0x2,
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IRAM_SIZE_THREE_KB = 0x3,
300+
/* The next two values are available for IPA v4.5 and above */
301+
IRAM_SIZE_THREE_N_HALF_KB = 0x4,
302+
IRAM_SIZE_FOUR_KB = 0x5,
290303
};
291304

292305
/* IRQ condition for each type is cleared by writing type-specific register */

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