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Commit 55a0fd2

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[x86] fix formatting; NFC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288045 91177308-0d34-0410-b5e6-96231b3b80d8
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lib/Target/X86/X86ISelLowering.cpp

Lines changed: 14 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -30007,7 +30007,7 @@ static SDValue combineOr(SDNode *N, SelectionDAG &DAG,
3000730007
return SDValue();
3000830008
}
3000930009

30010-
// Generate NEG and CMOV for integer abs.
30010+
/// Generate NEG and CMOV for integer abs.
3001130011
static SDValue combineIntegerAbs(SDNode *N, SelectionDAG &DAG) {
3001230012
EVT VT = N->getValueType(0);
3001330013

@@ -30023,21 +30023,19 @@ static SDValue combineIntegerAbs(SDNode *N, SelectionDAG &DAG) {
3002330023
// Check pattern of XOR(ADD(X,Y), Y) where Y is SRA(X, size(X)-1)
3002430024
// and change it to SUB and CMOV.
3002530025
if (VT.isInteger() && N->getOpcode() == ISD::XOR &&
30026-
N0.getOpcode() == ISD::ADD &&
30027-
N0.getOperand(1) == N1 &&
30028-
N1.getOpcode() == ISD::SRA &&
30029-
N1.getOperand(0) == N0.getOperand(0))
30030-
if (ConstantSDNode *Y1C = dyn_cast<ConstantSDNode>(N1.getOperand(1)))
30031-
if (Y1C->getAPIntValue() == VT.getSizeInBits()-1) {
30032-
// Generate SUB & CMOV.
30033-
SDValue Neg = DAG.getNode(X86ISD::SUB, DL, DAG.getVTList(VT, MVT::i32),
30034-
DAG.getConstant(0, DL, VT), N0.getOperand(0));
30035-
30036-
SDValue Ops[] = { N0.getOperand(0), Neg,
30037-
DAG.getConstant(X86::COND_GE, DL, MVT::i8),
30038-
SDValue(Neg.getNode(), 1) };
30039-
return DAG.getNode(X86ISD::CMOV, DL, DAG.getVTList(VT, MVT::Glue), Ops);
30040-
}
30026+
N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1 &&
30027+
N1.getOpcode() == ISD::SRA && N1.getOperand(0) == N0.getOperand(0)) {
30028+
auto *Y1C = dyn_cast<ConstantSDNode>(N1.getOperand(1));
30029+
if (Y1C && Y1C->getAPIntValue() == VT.getSizeInBits() - 1) {
30030+
// Generate SUB & CMOV.
30031+
SDValue Neg = DAG.getNode(X86ISD::SUB, DL, DAG.getVTList(VT, MVT::i32),
30032+
DAG.getConstant(0, DL, VT), N0.getOperand(0));
30033+
SDValue Ops[] = {N0.getOperand(0), Neg,
30034+
DAG.getConstant(X86::COND_GE, DL, MVT::i8),
30035+
SDValue(Neg.getNode(), 1)};
30036+
return DAG.getNode(X86ISD::CMOV, DL, DAG.getVTList(VT, MVT::Glue), Ops);
30037+
}
30038+
}
3004130039
return SDValue();
3004230040
}
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