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[PowerPC] Do not produce invalid CTR loop with an FRem
An FRem instruction inside a loop should prevent the loop from being converted into a CTR loop since this is not an operation that is legal on any PPC subtarget. This will always be a call to a library function which means the loop will be invalid if this instruction is in the body. Fixes PR36292. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@325739 91177308-0d34-0410-b5e6-96231b3b80d8
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lib/Target/PowerPC/PPCCTRLoops.cpp

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Original file line numberDiff line numberDiff line change
@@ -455,13 +455,16 @@ bool PPCCTRLoops::mightUseCTR(BasicBlock *BB) {
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return true;
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}
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// FREM is always a call.
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if (J->getOpcode() == Instruction::FRem)
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return true;
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if (STI->useSoftFloat()) {
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switch(J->getOpcode()) {
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case Instruction::FAdd:
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case Instruction::FSub:
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case Instruction::FMul:
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case Instruction::FDiv:
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case Instruction::FRem:
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case Instruction::FPTrunc:
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case Instruction::FPExt:
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case Instruction::FPToUI:

test/CodeGen/PowerPC/pr36292.ll

Lines changed: 46 additions & 0 deletions
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@@ -0,0 +1,46 @@
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown < %s | \
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; RUN: FileCheck %s --implicit-check-not=mtctr --implicit-check-not=bdnz
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$test = comdat any
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; No CTR loop due to frem (since it is always a call).
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define void @test() #0 comdat {
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; CHECK-LABEL: test:
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; CHECK: ld 29, 0(3)
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; CHECK: ld 30, 40(1)
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; CHECK: xxlxor 31, 31, 31
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; CHECK: cmpld 30, 29
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; CHECK-NEXT: bge- 0, .LBB0_2
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; CHECK-NEXT: .p2align 5
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; CHECK-NEXT: .LBB0_1: # %bounds.ok
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; CHECK: fmr 1, 31
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; CHECK-NEXT: lfsx 2, 0, 3
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; CHECK-NEXT: bl fmodf
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; CHECK-NEXT: nop
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; CHECK-NEXT: addi 30, 30, 1
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; CHECK-NEXT: stfsx 1, 0, 3
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; CHECK-NEXT: cmpld 30, 29
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; CHECK-NEXT: blt+ 0, .LBB0_1
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; CHECK-NEXT: .LBB0_2: # %bounds.fail
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; CHECK-NEXT: std 30, 40(1)
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%pos = alloca i64, align 8
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br label %forcond
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forcond: ; preds = %bounds.ok, %0
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%1 = load i64, i64* %pos
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%.len1 = load i64, i64* undef
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%bounds.cmp = icmp ult i64 %1, %.len1
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br i1 %bounds.cmp, label %bounds.ok, label %bounds.fail
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bounds.ok: ; preds = %forcond
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%2 = load float, float* undef
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%3 = frem float 0.000000e+00, %2
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store float %3, float* undef
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%4 = load i64, i64* %pos
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%5 = add i64 %4, 1
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store i64 %5, i64* %pos
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br label %forcond
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bounds.fail: ; preds = %forcond
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unreachable
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}
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