Skip to content
This repository was archived by the owner on Apr 23, 2020. It is now read-only.

Commit a431507

Browse files
committed
Merging r323816:
------------------------------------------------------------------------ r323816 | evandro | 2018-01-30 13:14:11 -0800 (Tue, 30 Jan 2018) | 5 lines [AArch64] Expand testing of zero cycle zeroing Make sure that r321824 doesn't change zeroing. Differential revision: https://reviews.llvm.org/D42089 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_60@332651 91177308-0d34-0410-b5e6-96231b3b80d8
1 parent 64c8bcf commit a431507

File tree

1 file changed

+29
-34
lines changed

1 file changed

+29
-34
lines changed

test/CodeGen/AArch64/arm64-zero-cycle-zeroing.ll

Lines changed: 29 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -1,36 +1,39 @@
1-
; RUN: llc -mtriple=arm64-apple-ios -mcpu=cyclone < %s | FileCheck %s -check-prefix=CYCLONE --check-prefix=ALL
2-
; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=kryo < %s | FileCheck %s -check-prefix=KRYO --check-prefix=ALL
3-
; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=falkor < %s | FileCheck %s -check-prefix=FALKOR --check-prefix=ALL
1+
; RUN: llc -mtriple=arm64-apple-ios -mcpu=cyclone < %s | FileCheck %s -check-prefixes=ALL,CYCLONE
2+
; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=exynos-m1 < %s | FileCheck %s -check-prefixes=ALL,OTHERS
3+
; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=exynos-m3 < %s | FileCheck %s -check-prefixes=ALL,OTHERS
4+
; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=kryo < %s | FileCheck %s -check-prefixes=ALL,OTHERS
5+
; RUN: llc -mtriple=aarch64-gnu-linux -mcpu=falkor < %s | FileCheck %s -check-prefixes=ALL,OTHERS
46

57
; rdar://11481771
68
; rdar://13713797
79

10+
declare void @bar(half, float, double, <2 x double>)
11+
declare void @bari(i32, i32)
12+
declare void @barl(i64, i64)
13+
declare void @barf(float, float)
14+
815
define void @t1() nounwind ssp {
916
entry:
1017
; ALL-LABEL: t1:
1118
; ALL-NOT: fmov
12-
; CYCLONE: fmov d0, xzr
13-
; CYCLONE: fmov d1, xzr
19+
; CYCLONE: fmov h0, wzr
20+
; CYCLONE: fmov s1, wzr
1421
; CYCLONE: fmov d2, xzr
15-
; CYCLONE: fmov d3, xzr
16-
; KRYO: movi v0.2d, #0000000000000000
17-
; KRYO: movi v1.2d, #0000000000000000
18-
; KRYO: movi v2.2d, #0000000000000000
19-
; KRYO: movi v3.2d, #0000000000000000
20-
; FALKOR: movi v0.2d, #0000000000000000
21-
; FALKOR: movi v1.2d, #0000000000000000
22-
; FALKOR: movi v2.2d, #0000000000000000
23-
; FALKOR: movi v3.2d, #0000000000000000
24-
tail call void @bar(double 0.000000e+00, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00) nounwind
22+
; CYCLONE: movi.16b v3, #0
23+
; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
24+
; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
25+
; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
26+
; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
27+
tail call void @bar(half 0.000000e+00, float 0.000000e+00, double 0.000000e+00, <2 x double> <double 0.000000e+00, double 0.000000e+00>) nounwind
2528
ret void
2629
}
2730

2831
define void @t2() nounwind ssp {
2932
entry:
3033
; ALL-LABEL: t2:
3134
; ALL-NOT: mov w0, wzr
32-
; ALL: mov w0, #0
33-
; ALL: mov w1, #0
35+
; ALL: mov w{{[0-3]+}}, #0
36+
; ALL: mov w{{[0-3]+}}, #0
3437
tail call void @bari(i32 0, i32 0) nounwind
3538
ret void
3639
}
@@ -39,35 +42,28 @@ define void @t3() nounwind ssp {
3942
entry:
4043
; ALL-LABEL: t3:
4144
; ALL-NOT: mov x0, xzr
42-
; ALL: mov x0, #0
43-
; ALL: mov x1, #0
45+
; ALL: mov x{{[0-3]+}}, #0
46+
; ALL: mov x{{[0-3]+}}, #0
4447
tail call void @barl(i64 0, i64 0) nounwind
4548
ret void
4649
}
4750

4851
define void @t4() nounwind ssp {
4952
; ALL-LABEL: t4:
5053
; ALL-NOT: fmov
51-
; CYCLONE: fmov s0, wzr
52-
; CYCLONE: fmov s1, wzr
53-
; KRYO: movi v0.2d, #0000000000000000
54-
; KRYO: movi v1.2d, #0000000000000000
55-
; FALKOR: movi v0.2d, #0000000000000000
56-
; FALKOR: movi v1.2d, #0000000000000000
54+
; CYCLONE: fmov s{{[0-3]+}}, wzr
55+
; CYCLONE: fmov s{{[0-3]+}}, wzr
56+
; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
57+
; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
5758
tail call void @barf(float 0.000000e+00, float 0.000000e+00) nounwind
5859
ret void
5960
}
6061

61-
declare void @bar(double, double, double, double)
62-
declare void @bari(i32, i32)
63-
declare void @barl(i64, i64)
64-
declare void @barf(float, float)
65-
6662
; We used to produce spills+reloads for a Q register with zero cycle zeroing
6763
; enabled.
6864
; ALL-LABEL: foo:
69-
; ALL-NOT: str {{q[0-9]+}}
70-
; ALL-NOT: ldr {{q[0-9]+}}
65+
; ALL-NOT: str q{{[0-9]+}}
66+
; ALL-NOT: ldr q{{[0-9]+}}
7167
define double @foo(i32 %n) {
7268
entry:
7369
br label %for.body
@@ -90,8 +86,7 @@ for.end:
9086
define <2 x i64> @t6() {
9187
; ALL-LABEL: t6:
9288
; CYCLONE: movi.16b v0, #0
93-
; KRYO: movi v0.2d, #0000000000000000
94-
; FALKOR: movi v0.2d, #0000000000000000
89+
; OTHERS: movi v0.2d, #0000000000000000
9590
ret <2 x i64> zeroinitializer
9691
}
9792

0 commit comments

Comments
 (0)