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| 1 | +# RUN: llc -mtriple=arm-none-eabi -run-pass=arm-cp-islands %s -o - | FileCheck %s |
| 2 | +# |
| 3 | +# This checks alignment of a block when a CPE is placed before/after a |
| 4 | +# block (as e.g. opposed to splitting up a block). |
| 5 | +# |
| 6 | +--- | |
| 7 | + ; ModuleID = '<stdin>' |
| 8 | + source_filename = "<stdin>" |
| 9 | + target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" |
| 10 | + target triple = "arm-arm--eabi" |
| 11 | + |
| 12 | + declare i32 @llvm.arm.space(i32, i32) #0 |
| 13 | + |
| 14 | + define dso_local i32 @CP() #1 { |
| 15 | + entry: |
| 16 | + %res = alloca half, align 2 |
| 17 | + store half 0xH706B, half* %res, align 2 |
| 18 | + %0 = load half, half* %res, align 2 |
| 19 | + %tobool = fcmp une half %0, 0xH0000 |
| 20 | + br i1 %tobool, label %LA, label %END |
| 21 | + |
| 22 | + LA: ; preds = %entry |
| 23 | + %1 = call i32 @llvm.arm.space(i32 1000, i32 undef) |
| 24 | + br label %END |
| 25 | + |
| 26 | + END: ; preds = %LA, %entry |
| 27 | + %2 = call i32 @llvm.arm.space(i32 100, i32 undef) |
| 28 | + ret i32 42 |
| 29 | + } |
| 30 | + |
| 31 | + ; Function Attrs: nounwind |
| 32 | + declare void @llvm.stackprotector(i8*, i8**) #2 |
| 33 | + |
| 34 | + attributes #0 = { nounwind "target-features"="+v8.2a,+fullfp16" } |
| 35 | + attributes #1 = { "target-features"="+v8.2a,+fullfp16" } |
| 36 | + attributes #2 = { nounwind } |
| 37 | + |
| 38 | +... |
| 39 | +--- |
| 40 | +name: CP |
| 41 | +alignment: 2 |
| 42 | +exposesReturnsTwice: false |
| 43 | +legalized: false |
| 44 | +regBankSelected: false |
| 45 | +selected: false |
| 46 | +tracksRegLiveness: true |
| 47 | +registers: |
| 48 | +liveins: |
| 49 | +frameInfo: |
| 50 | + isFrameAddressTaken: false |
| 51 | + isReturnAddressTaken: false |
| 52 | + hasStackMap: false |
| 53 | + hasPatchPoint: false |
| 54 | + stackSize: 4 |
| 55 | + offsetAdjustment: 0 |
| 56 | + maxAlignment: 2 |
| 57 | + adjustsStack: false |
| 58 | + hasCalls: false |
| 59 | + stackProtector: '' |
| 60 | + maxCallFrameSize: 0 |
| 61 | + hasOpaqueSPAdjustment: false |
| 62 | + hasVAStart: false |
| 63 | + hasMustTailInVarArgFunc: false |
| 64 | + savePoint: '' |
| 65 | + restorePoint: '' |
| 66 | +fixedStack: |
| 67 | +stack: |
| 68 | + - { id: 0, name: res, type: default, offset: -2, size: 2, alignment: 2, |
| 69 | + stack-id: 0, callee-saved-register: '', callee-saved-restored: true, |
| 70 | + local-offset: -2, di-variable: '', di-expression: '', di-location: '' } |
| 71 | +constants: |
| 72 | + - id: 0 |
| 73 | + value: half 0xH706B |
| 74 | + alignment: 2 |
| 75 | + isTargetSpecific: false |
| 76 | + |
| 77 | + |
| 78 | +#CHECK: bb.{{.*}} (align 1): |
| 79 | +#CHECK: successors: |
| 80 | +#CHECK: CONSTPOOL_ENTRY 1, %const{{.*}}, 2 |
| 81 | +# We want this block to be 4 byte aligned: |
| 82 | +#CHECK: bb.{{.*}}.LA (align 2): |
| 83 | + |
| 84 | +body: | |
| 85 | + bb.0.entry: |
| 86 | + successors: %bb.1(0x50000000), %bb.2(0x30000000) |
| 87 | +
|
| 88 | + $sp = frame-setup SUBri $sp, 4, 14, $noreg, $noreg |
| 89 | + frame-setup CFI_INSTRUCTION def_cfa_offset 4 |
| 90 | + renamable $s0 = VLDRH %const.0, 0, 14, $noreg :: (load 2 from constant-pool) |
| 91 | + VCMPZH renamable $s0, 14, $noreg, implicit-def $fpscr_nzcv |
| 92 | + VSTRH killed renamable $s0, $sp, 1, 14, $noreg :: (store 2 into %ir.res) |
| 93 | + FMSTAT 14, $noreg, implicit-def $cpsr, implicit killed $fpscr_nzcv |
| 94 | + Bcc %bb.2, 0, killed $cpsr |
| 95 | +
|
| 96 | + bb.1.LA: |
| 97 | + successors: %bb.2(0x80000000) |
| 98 | +
|
| 99 | + dead renamable $r0 = SPACE 1000, undef renamable $r0 |
| 100 | +
|
| 101 | + bb.2.END: |
| 102 | + dead renamable $r0 = SPACE 100, undef renamable $r0 |
| 103 | + $r0 = MOVi 42, 14, $noreg, $noreg |
| 104 | + $sp = ADDri $sp, 4, 14, $noreg, $noreg |
| 105 | + BX_RET 14, $noreg, implicit killed $r0 |
| 106 | +
|
| 107 | +... |
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