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[RISCV] Add LUI/AUIPC+ADDI fusions to sifive-p450. (llvm#78501)
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llvm/lib/Target/RISCV/RISCVProcessors.td

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@@ -233,7 +233,9 @@ def SIFIVE_P450 : RISCVProcessorModel<"sifive-p450", SiFiveP400Model,
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FeatureStdExtZbb,
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FeatureStdExtZbs,
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FeatureStdExtZfhmin],
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[TuneConditionalCompressedMoveFusion]>;
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[TuneConditionalCompressedMoveFusion,
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TuneLUIADDIFusion,
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TuneAUIPCADDIFusion]>;
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def SYNTACORE_SCR1_BASE : RISCVProcessorModel<"syntacore-scr1-base",
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SyntacoreSCR1Model,

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