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target triple = "aarch64-unknown-linux-gnu"
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- define i32 @pr70988 () {
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+ define i32 @pr70988 (ptr %src , i32 %n ) {
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; CHECK-LABEL: define i32 @pr70988(
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; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: entry:
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- ; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr null, align 4
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- ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[TMP0]], 15
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+ ; CHECK-NEXT: [[TMP1:%.*]] = and i32 %n, 15
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; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.umax.i32(i32 [[TMP1]], i32 1)
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; CHECK-NEXT: [[UMAX:%.*]] = zext i32 [[TMP2]] to i64
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; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
@@ -28,7 +27,7 @@ define i32 @pr70988() {
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; CHECK-NEXT: br i1 [[ACTIVE_LANE_MASK]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]]
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; CHECK: pred.load.if:
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; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0
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- ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr null , i64 [[TMP3]]
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+ ; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i32, ptr %src , i64 [[TMP3]]
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; CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
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; CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
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; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]]
@@ -38,7 +37,7 @@ define i32 @pr70988() {
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; CHECK-NEXT: br i1 [[ACTIVE_LANE_MASK2]], label [[PRED_LOAD_IF4:%.*]], label [[PRED_LOAD_CONTINUE5]]
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; CHECK: pred.load.if4:
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; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 1
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- ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i32, ptr null , i64 [[TMP9]]
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+ ; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i32, ptr %src , i64 [[TMP9]]
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; CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
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; CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
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; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE5]]
@@ -65,7 +64,7 @@ define i32 @pr70988() {
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; CHECK: loop:
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; CHECK-NEXT: [[INDUC:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDUC_NEXT:%.*]], [[LOOP]] ]
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; CHECK-NEXT: [[MAX:%.*]] = phi i32 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[TMP24:%.*]], [[LOOP]] ]
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- ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, ptr null , i64 [[INDUC]]
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+ ; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, ptr %src , i64 [[INDUC]]
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; CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[GEP]], align 8
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; CHECK-NEXT: [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
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; CHECK-NEXT: [[TMP24]] = tail call i32 @llvm.smax.i32(i32 [[TMP23]], i32 [[MAX]])
@@ -77,16 +76,15 @@ define i32 @pr70988() {
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; CHECK-NEXT: ret i32 [[RES]]
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;
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entry:
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- %0 = load i32 , ptr null
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- %1 = and i32 %0 , 15
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+ %1 = and i32 %n , 15
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%2 = call i32 @llvm.umax.i32 (i32 %1 , i32 1 )
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%umax = zext i32 %2 to i64
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br label %loop
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loop:
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%induc = phi i64 [ 0 , %entry ], [ %induc.next , %loop ]
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%max = phi i32 [ 0 , %entry ], [ %5 , %loop ]
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- %gep = getelementptr i32 , ptr null , i64 %induc
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+ %gep = getelementptr i32 , ptr %src , i64 %induc
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%3 = load ptr , ptr %gep
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%4 = load i32 , ptr %3
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%5 = tail call i32 @llvm.smax.i32 (i32 %4 , i32 %max )
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