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Commit 0075167

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VyacheslavLevytskyyVyacheslavLevytskyy
committed
an initial version of module analysis without explicitly built dependency graph
1 parent 231d113 commit 0075167

32 files changed

+512
-189
lines changed

‎llvm/lib/Target/SPIRV/SPIRVAsmPrinter.cpp

Lines changed: 6 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -274,7 +274,7 @@ void SPIRVAsmPrinter::emitInstruction(const MachineInstr *MI) {
274274
}
275275

276276
void SPIRVAsmPrinter::outputModuleSection(SPIRV::ModuleSectionType MSType) {
277-
for (MachineInstr *MI : MAI->getMSInstrs(MSType))
277+
for (const MachineInstr *MI : MAI->getMSInstrs(MSType))
278278
outputInstruction(MI);
279279
}
280280

@@ -326,7 +326,7 @@ void SPIRVAsmPrinter::outputOpMemoryModel() {
326326
void SPIRVAsmPrinter::outputEntryPoints() {
327327
// Find all OpVariable IDs with required StorageClass.
328328
DenseSet<Register> InterfaceIDs;
329-
for (MachineInstr *MI : MAI->GlobalVarList) {
329+
for (const MachineInstr *MI : MAI->GlobalVarList) {
330330
assert(MI->getOpcode() == SPIRV::OpVariable);
331331
auto SC = static_cast<SPIRV::StorageClass::StorageClass>(
332332
MI->getOperand(2).getImm());
@@ -336,14 +336,14 @@ void SPIRVAsmPrinter::outputEntryPoints() {
336336
// declaring all global variables referenced by the entry point call tree.
337337
if (ST->isAtLeastSPIRVVer(VersionTuple(1, 4)) ||
338338
SC == SPIRV::StorageClass::Input || SC == SPIRV::StorageClass::Output) {
339-
MachineFunction *MF = MI->getMF();
339+
const MachineFunction *MF = MI->getMF();
340340
Register Reg = MAI->getRegisterAlias(MF, MI->getOperand(0).getReg());
341341
InterfaceIDs.insert(Reg);
342342
}
343343
}
344344

345345
// Output OpEntryPoints adding interface args to all of them.
346-
for (MachineInstr *MI : MAI->getMSInstrs(SPIRV::MB_EntryPoints)) {
346+
for (const MachineInstr *MI : MAI->getMSInstrs(SPIRV::MB_EntryPoints)) {
347347
SPIRVMCInstLower MCInstLowering;
348348
MCInst TmpInst;
349349
MCInstLowering.lower(MI, TmpInst, MAI);
@@ -381,9 +381,8 @@ void SPIRVAsmPrinter::outputGlobalRequirements() {
381381

382382
void SPIRVAsmPrinter::outputExtFuncDecls() {
383383
// Insert OpFunctionEnd after each declaration.
384-
SmallVectorImpl<MachineInstr *>::iterator
385-
I = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).begin(),
386-
E = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).end();
384+
auto I = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).begin(),
385+
E = MAI->getMSInstrs(SPIRV::MB_ExtFuncDecls).end();
387386
for (; I != E; ++I) {
388387
outputInstruction(*I);
389388
if ((I + 1) == E || (*(I + 1))->getOpcode() == SPIRV::OpFunction)

‎llvm/lib/Target/SPIRV/SPIRVCallLowering.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -418,6 +418,7 @@ bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
418418
.addImm(FuncControl)
419419
.addUse(GR->getSPIRVTypeID(FuncTy));
420420
GR->recordFunctionDefinition(&F, &MB.getInstr()->getOperand(0));
421+
GR->addGlobalObject(&F, &MIRBuilder.getMF(), FuncVReg);
421422

422423
// Add OpFunctionParameter instructions
423424
int i = 0;
@@ -431,6 +432,7 @@ bool SPIRVCallLowering::lowerFormalArguments(MachineIRBuilder &MIRBuilder,
431432
.addUse(GR->getSPIRVTypeID(ArgTypeVRegs[i]));
432433
if (F.isDeclaration())
433434
GR->add(&Arg, &MIRBuilder.getMF(), ArgReg);
435+
GR->addGlobalObject(&Arg, &MIRBuilder.getMF(), ArgReg);
434436
i++;
435437
}
436438
// Name the function.

‎llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -721,6 +721,7 @@ Register SPIRVGlobalRegistry::buildGlobalVariable(
721721
}
722722
Reg = MIB->getOperand(0).getReg();
723723
DT.add(GVar, &MIRBuilder.getMF(), Reg);
724+
addGlobalObject(GVar, &MIRBuilder.getMF(), Reg);
724725

725726
// Set to Reg the same type as ResVReg has.
726727
auto MRI = MIRBuilder.getMRI();

‎llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -89,6 +89,10 @@ class SPIRVGlobalRegistry {
8989
// Intrinsic::spv_assign_ptr_type instructions.
9090
DenseMap<Value *, CallInst *> AssignPtrTypeInstr;
9191

92+
// Maps OpVariable and OpFunction-related v-regs to its LLVM IR definition.
93+
DenseMap<std::pair<const MachineFunction *, Register>, const Value *>
94+
Reg2GO;
95+
9296
// Add a new OpTypeXXX instruction without checking for duplicates.
9397
SPIRVType *createSPIRVType(const Type *Type, MachineIRBuilder &MIRBuilder,
9498
SPIRV::AccessQualifier::AccessQualifier AQ =
@@ -160,6 +164,14 @@ class SPIRVGlobalRegistry {
160164
void setBound(unsigned V) { Bound = V; }
161165
unsigned getBound() { return Bound; }
162166

167+
void addGlobalObject(const Value *V, const MachineFunction *MF, Register R) {
168+
Reg2GO[std::make_pair(MF, R)] = V;
169+
}
170+
const Value *getGlobalObject(const MachineFunction *MF, Register R) {
171+
auto It = Reg2GO.find(std::make_pair(MF, R));
172+
return It == Reg2GO.end() ? nullptr : It->second;
173+
}
174+
163175
// Add a record to the map of function return pointer types.
164176
void addReturnType(const Function *ArgF, TypedPointerType *DerivedTy) {
165177
FunResPointerTypes[ArgF] = DerivedTy;

‎llvm/lib/Target/SPIRV/SPIRVInstrInfo.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,18 @@ bool SPIRVInstrInfo::isConstantInstr(const MachineInstr &MI) const {
4747
}
4848
}
4949

50+
bool SPIRVInstrInfo::isSpecConstantInstr(const MachineInstr &MI) const {
51+
switch (MI.getOpcode()) {
52+
case SPIRV::OpSpecConstantTrue:
53+
case SPIRV::OpSpecConstantFalse:
54+
case SPIRV::OpSpecConstant:
55+
case SPIRV::OpSpecConstantComposite:
56+
case SPIRV::OpSpecConstantOp:
57+
return true;
58+
default:
59+
return false;
60+
}
61+
}
5062
bool SPIRVInstrInfo::isInlineAsmDefInstr(const MachineInstr &MI) const {
5163
switch (MI.getOpcode()) {
5264
case SPIRV::OpAsmTargetINTEL:

‎llvm/lib/Target/SPIRV/SPIRVInstrInfo.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,6 +30,7 @@ class SPIRVInstrInfo : public SPIRVGenInstrInfo {
3030
const SPIRVRegisterInfo &getRegisterInfo() const { return RI; }
3131
bool isHeaderInstr(const MachineInstr &MI) const;
3232
bool isConstantInstr(const MachineInstr &MI) const;
33+
bool isSpecConstantInstr(const MachineInstr &MI) const;
3334
bool isInlineAsmDefInstr(const MachineInstr &MI) const;
3435
bool isTypeDeclInstr(const MachineInstr &MI) const;
3536
bool isDecorationInstr(const MachineInstr &MI) const;

‎llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 14 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1117,6 +1117,7 @@ bool SPIRVInstructionSelector::selectMemOperation(Register ResVReg,
11171117
Constant::getNullValue(LLVMArrTy));
11181118
Register VarReg = MRI->createGenericVirtualRegister(LLT::scalar(64));
11191119
GR.add(GV, GR.CurMF, VarReg);
1120+
GR.addGlobalObject(GV, GR.CurMF, VarReg);
11201121

11211122
Result &=
11221123
BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(SPIRV::OpVariable))
@@ -3509,18 +3510,25 @@ bool SPIRVInstructionSelector::selectGlobalValue(
35093510
// References to a function via function pointers generate virtual
35103511
// registers without a definition. We will resolve it later, during
35113512
// module analysis stage.
3513+
Register ResTypeReg = GR.getSPIRVTypeID(ResType);
35123514
MachineRegisterInfo *MRI = MIRBuilder.getMRI();
3513-
Register FuncVReg = MRI->createGenericVirtualRegister(LLT::scalar(64));
3514-
MRI->setRegClass(FuncVReg, &SPIRV::iIDRegClass);
3515-
MachineInstrBuilder MB =
3515+
Register FuncVReg =
3516+
MRI->createGenericVirtualRegister(GR.getRegType(ResType));
3517+
MRI->setRegClass(FuncVReg, &SPIRV::pIDRegClass);
3518+
MachineInstrBuilder MIB1 =
3519+
BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpUndef))
3520+
.addDef(FuncVReg)
3521+
.addUse(ResTypeReg);
3522+
MachineInstrBuilder MIB2 =
35163523
BuildMI(BB, I, I.getDebugLoc(),
35173524
TII.get(SPIRV::OpConstantFunctionPointerINTEL))
35183525
.addDef(NewReg)
3519-
.addUse(GR.getSPIRVTypeID(ResType))
3526+
.addUse(ResTypeReg)
35203527
.addUse(FuncVReg);
35213528
// mapping the function pointer to the used Function
3522-
GR.recordFunctionPointer(&MB.getInstr()->getOperand(2), GVFun);
3523-
return MB.constrainAllUses(TII, TRI, RBI);
3529+
GR.recordFunctionPointer(&MIB2.getInstr()->getOperand(2), GVFun);
3530+
return MIB1.constrainAllUses(TII, TRI, RBI) &&
3531+
MIB2.constrainAllUses(TII, TRI, RBI);
35243532
}
35253533
return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpConstantNull))
35263534
.addDef(NewReg)

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