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- add constrainAllUses to first spirv op - update testcase for ease of reading - use enum instead of int equivalent for documentation
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+7
-10
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Lines changed: 4 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,22 +1,18 @@
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// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -triple \
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// RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes -o - | \
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// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-DXIL
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// RUN: FileCheck %s -DTARGET=dx
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// RUN: %clang_cc1 -std=hlsl2021 -finclude-default-header -triple \
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// RUN: spirv-pc-vulkan-compute %s -emit-llvm -disable-llvm-passes -o - | \
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// RUN: FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV
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// RUN: FileCheck %s -DTARGET=spv
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// Test basic lowering to runtime function call.
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// CHECK-LABEL: test_bool
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int test_bool(bool expr) {
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// CHECK-SPIRV: %[[#entry_tok:]] = call token @llvm.experimental.convergence.entry()
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// CHECK-SPIRV: %[[RET:.*]] = call spir_func i32 @llvm.spv.wave.active.countbits(i1 %{{.*}}) [ "convergencectrl"(token %[[#entry_tok]]) ]
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// CHECK-DXIL: %[[RET:.*]] = call i32 @llvm.dx.wave.active.countbits(i1 %{{.*}})
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// CHECK: ret i32 %[[RET]]
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// CHECK: call {{.*}} @llvm.[[TARGET]].wave.active.countbits
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return WaveActiveCountBits(expr);
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}
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// CHECK-DXIL: declare i32 @llvm.dx.wave.active.countbits(i1) #[[#attr:]]
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// CHECK-SPIRV: declare i32 @llvm.spv.wave.active.countbits(i1) #[[#attr:]]
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// CHECK: declare i32 @llvm.[[TARGET]].wave.active.countbits(i1) #[[#attr:]]
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// CHECK: attributes #[[#attr]] = {{{.*}} convergent {{.*}}}

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1780,15 +1780,16 @@ bool SPIRVInstructionSelector::selectWaveActiveCountBits(
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.addDef(BallotReg)
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.addUse(GR.getSPIRVTypeID(BallotType))
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.addUse(GR.getOrCreateConstInt(SPIRV::Scope::Subgroup, I, IntTy, TII))
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.addUse(I.getOperand(2).getReg());
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.addUse(I.getOperand(2).getReg())
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.constrainAllUses(TII, TRI, RBI);
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Result |=
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BuildMI(BB, I, I.getDebugLoc(),
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TII.get(SPIRV::OpGroupNonUniformBallotBitCount))
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.addDef(ResVReg)
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.addUse(GR.getSPIRVTypeID(ResType))
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.addUse(GR.getOrCreateConstInt(SPIRV::Scope::Subgroup, I, IntTy, TII))
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.addImm(0)
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.addImm(SPIRV::GroupOperation::Reduce)
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.addUse(BallotReg)
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.constrainAllUses(TII, TRI, RBI);
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