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1 parent fcbbfeb commit 0190737Copy full SHA for 0190737
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
@@ -3862,7 +3862,7 @@ bool RISCVDAGToDAGISel::performCombineVMergeAndVOps(SDNode *N) {
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// If the EEW of True is different from vmerge's SEW, then we cannot change
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// the VL or mask.
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- if (Log2_64(True.getSimpleValueType().getScalarSizeInBits()) !=
+ if (Log2_64(True.getScalarValueSizeInBits()) !=
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N->getConstantOperandVal(
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RISCVII::getSEWOpNum(TII->get(N->getMachineOpcode())) - 1))
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return false;
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