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MIPSr6: Set FMAXNUM and FMINNUM as Legal (#139009)
Now we define FMAXNUM and FMINNUM as IEEE754-2008 with +0.0>-0.0. MIPSr6's fmax/fmin just follow this rules full. FMAXNUM_IEEE and FMINNUM_IEEE will be removed in future once: 1. Fixes FMAXNUM/FMINNUM for all targets 2. The use of FMAXNUM_IEEE/FMINNUM_IEEE are not used by middle end anymore.
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4 files changed

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‎llvm/lib/Target/Mips/Mips32r6InstrInfo.td

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1122,15 +1122,27 @@ let AdditionalPredicates = [NotInMicroMips] in {
11221122
def : MipsPat<(fmaxnum_ieee f32:$lhs, f32:$rhs),
11231123
(MAX_S f32:$lhs, f32:$rhs)>,
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ISA_MIPS32R6;
1125+
def : MipsPat<(fmaxnum f32:$lhs, f32:$rhs),
1126+
(MAX_S f32:$lhs, f32:$rhs)>,
1127+
ISA_MIPS32R6;
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def : MipsPat<(fmaxnum_ieee f64:$lhs, f64:$rhs),
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(MAX_D f64:$lhs, f64:$rhs)>,
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ISA_MIPS32R6;
1131+
def : MipsPat<(fmaxnum f64:$lhs, f64:$rhs),
1132+
(MAX_D f64:$lhs, f64:$rhs)>,
1133+
ISA_MIPS32R6;
11281134
def : MipsPat<(fminnum_ieee f32:$lhs, f32:$rhs),
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(MIN_S f32:$lhs, f32:$rhs)>,
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ISA_MIPS32R6;
1137+
def : MipsPat<(fminnum f32:$lhs, f32:$rhs),
1138+
(MIN_S f32:$lhs, f32:$rhs)>,
1139+
ISA_MIPS32R6;
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def : MipsPat<(fminnum_ieee f64:$lhs, f64:$rhs),
11321141
(MIN_D f64:$lhs, f64:$rhs)>,
11331142
ISA_MIPS32R6;
1143+
def : MipsPat<(fminnum f64:$lhs, f64:$rhs),
1144+
(MIN_D f64:$lhs, f64:$rhs)>,
1145+
ISA_MIPS32R6;
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def : MipsPat<(f32 (fcanonicalize f32:$src)),
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(MIN_S f32:$src, f32:$src)>,
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ISA_MIPS32R6;

‎llvm/lib/Target/Mips/MipsISelLowering.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -365,12 +365,12 @@ MipsTargetLowering::MipsTargetLowering(const MipsTargetMachine &TM,
365365
if (Subtarget.hasMips32r6()) {
366366
setOperationAction(ISD::FMINNUM_IEEE, MVT::f32, Legal);
367367
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f32, Legal);
368-
setOperationAction(ISD::FMINNUM, MVT::f32, Expand);
369-
setOperationAction(ISD::FMAXNUM, MVT::f32, Expand);
368+
setOperationAction(ISD::FMINNUM, MVT::f32, Legal);
369+
setOperationAction(ISD::FMAXNUM, MVT::f32, Legal);
370370
setOperationAction(ISD::FMINNUM_IEEE, MVT::f64, Legal);
371371
setOperationAction(ISD::FMAXNUM_IEEE, MVT::f64, Legal);
372-
setOperationAction(ISD::FMINNUM, MVT::f64, Expand);
373-
setOperationAction(ISD::FMAXNUM, MVT::f64, Expand);
372+
setOperationAction(ISD::FMINNUM, MVT::f64, Legal);
373+
setOperationAction(ISD::FMAXNUM, MVT::f64, Legal);
374374
setOperationAction(ISD::IS_FPCLASS, MVT::f32, Legal);
375375
setOperationAction(ISD::IS_FPCLASS, MVT::f64, Legal);
376376
} else {

‎llvm/test/CodeGen/Mips/mipsr6-minmaxnum.ll

Lines changed: 33 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -1,80 +1,61 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
12
; RUN: llc %s -mtriple=mipsisa32r6el-linux-gnu -o - | \
23
; RUN: FileCheck %s --check-prefix=MIPS32R6EL
34
; RUN: llc %s -mtriple=mipsisa64r6el-linux-gnuabi64 -o - | \
45
; RUN: FileCheck %s --check-prefix=MIPS64R6EL
56

67
define float @mins(float %x, float %y) {
7-
; MIPS32R6EL-LABEL: mins
8-
; MIPS32R6EL: # %bb.0:
9-
; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
10-
; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
11-
; MIPS32R6EL-NEXT: jr $ra
12-
; MIPS32R6EL-NEXT: min.s $f0, $f1, $f0
8+
; MIPS32R6EL-LABEL: mins:
9+
; MIPS32R6EL: # %bb.0:
10+
; MIPS32R6EL-NEXT: jr $ra
11+
; MIPS32R6EL-NEXT: min.s $f0, $f12, $f14
1312
;
14-
; MIPS64R6EL-LABEL: mins
15-
; MIPS64R6EL: # %bb.0:
16-
; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
17-
; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
18-
; MIPS64R6EL-NEXT: jr $ra
19-
; MIPS64R6EL-NEXT: min.s $f0, $f1, $f0
20-
13+
; MIPS64R6EL-LABEL: mins:
14+
; MIPS64R6EL: # %bb.0:
15+
; MIPS64R6EL-NEXT: jr $ra
16+
; MIPS64R6EL-NEXT: min.s $f0, $f12, $f13
2117
%r = tail call float @llvm.minnum.f32(float %x, float %y)
2218
ret float %r
2319
}
2420

2521
define float @maxs(float %x, float %y) {
26-
; MIPS32R6EL-LABEL: maxs
27-
; MIPS32R6EL: # %bb.0:
28-
; MIPS32R6EL-NEXT: min.s $f0, $f14, $f14
29-
; MIPS32R6EL-NEXT: min.s $f1, $f12, $f12
30-
; MIPS32R6EL-NEXT: jr $ra
31-
; MIPS32R6EL-NEXT: max.s $f0, $f1, $f0
22+
; MIPS32R6EL-LABEL: maxs:
23+
; MIPS32R6EL: # %bb.0:
24+
; MIPS32R6EL-NEXT: jr $ra
25+
; MIPS32R6EL-NEXT: max.s $f0, $f12, $f14
3226
;
33-
; MIPS64R6EL-LABEL: maxs
34-
; MIPS64R6EL: # %bb.0:
35-
; MIPS64R6EL-NEXT: min.s $f0, $f13, $f13
36-
; MIPS64R6EL-NEXT: min.s $f1, $f12, $f12
37-
; MIPS64R6EL-NEXT: jr $ra
38-
; MIPS64R6EL-NEXT: max.s $f0, $f1, $f0
39-
27+
; MIPS64R6EL-LABEL: maxs:
28+
; MIPS64R6EL: # %bb.0:
29+
; MIPS64R6EL-NEXT: jr $ra
30+
; MIPS64R6EL-NEXT: max.s $f0, $f12, $f13
4031
%r = tail call float @llvm.maxnum.f32(float %x, float %y)
4132
ret float %r
4233
}
4334

4435
define double @mind(double %x, double %y) {
45-
; MIPS32R6EL-LABEL: mind
46-
; MIPS32R6EL: # %bb.0:
47-
; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
48-
; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
49-
; MIPS32R6EL-NEXT: jr $ra
50-
; MIPS32R6EL-NEXT: min.d $f0, $f1, $f0
36+
; MIPS32R6EL-LABEL: mind:
37+
; MIPS32R6EL: # %bb.0:
38+
; MIPS32R6EL-NEXT: jr $ra
39+
; MIPS32R6EL-NEXT: min.d $f0, $f12, $f14
5140
;
52-
; MIPS64R6EL-LABEL: mind
53-
; MIPS64R6EL: # %bb.0:
54-
; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
55-
; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
56-
; MIPS64R6EL-NEXT: jr $ra
57-
; MIPS64R6EL-NEXT: min.d $f0, $f1, $f0
58-
41+
; MIPS64R6EL-LABEL: mind:
42+
; MIPS64R6EL: # %bb.0:
43+
; MIPS64R6EL-NEXT: jr $ra
44+
; MIPS64R6EL-NEXT: min.d $f0, $f12, $f13
5945
%r = tail call double @llvm.minnum.f64(double %x, double %y)
6046
ret double %r
6147
}
6248

6349
define double @maxd(double %x, double %y) {
64-
; MIPS32R6EL-LABEL: maxd
65-
; MIPS32R6EL: # %bb.0:
66-
; MIPS32R6EL-NEXT: min.d $f0, $f14, $f14
67-
; MIPS32R6EL-NEXT: min.d $f1, $f12, $f12
68-
; MIPS32R6EL-NEXT: jr $ra
69-
; MIPS32R6EL-NEXT: max.d $f0, $f1, $f0
50+
; MIPS32R6EL-LABEL: maxd:
51+
; MIPS32R6EL: # %bb.0:
52+
; MIPS32R6EL-NEXT: jr $ra
53+
; MIPS32R6EL-NEXT: max.d $f0, $f12, $f14
7054
;
71-
; MIPS64R6EL-LABEL: maxd
72-
; MIPS64R6EL: # %bb.0:
73-
; MIPS64R6EL-NEXT: min.d $f0, $f13, $f13
74-
; MIPS64R6EL-NEXT: min.d $f1, $f12, $f12
75-
; MIPS64R6EL-NEXT: jr $ra
76-
; MIPS64R6EL-NEXT: max.d $f0, $f1, $f0
77-
55+
; MIPS64R6EL-LABEL: maxd:
56+
; MIPS64R6EL: # %bb.0:
57+
; MIPS64R6EL-NEXT: jr $ra
58+
; MIPS64R6EL-NEXT: max.d $f0, $f12, $f13
7859
%r = tail call double @llvm.maxnum.f64(double %x, double %y)
7960
ret double %r
8061
}

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