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3 files changed

+19
-9
lines changed

3 files changed

+19
-9
lines changed

llvm/lib/CodeGen/MachineConvergenceVerifier.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,9 @@ GenericConvergenceVerifier<MachineSSAContext>::findAndCheckConvergenceTokenUsed(
5151
const MachineRegisterInfo &MRI = Context.getFunction()->getRegInfo();
5252
const MachineInstr *TokenDef = nullptr;
5353

54-
for (const MachineOperand &MO : MI.all_uses()) {
54+
for (const MachineOperand &MO : MI.operands()) {
55+
if (!MO.isReg() || !MO.isUse())
56+
continue;
5557
Register OpReg = MO.getReg();
5658
if (!OpReg.isVirtual())
5759
continue;

llvm/lib/CodeGen/MachineInstr.cpp

Lines changed: 13 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1041,9 +1041,10 @@ unsigned MachineInstr::getBundleSize() const {
10411041
/// Returns true if the MachineInstr has an implicit-use operand of exactly
10421042
/// the given register (not considering sub/super-registers).
10431043
bool MachineInstr::hasRegisterImplicitUseOperand(Register Reg) const {
1044-
for (const MachineOperand &MO : all_uses())
1045-
if (MO.isImplicit() && MO.getReg() == Reg)
1044+
for (const MachineOperand &MO : operands()) {
1045+
if (MO.isReg() && MO.isUse() && MO.isImplicit() && MO.getReg() == Reg)
10461046
return true;
1047+
}
10471048
return false;
10481049
}
10491050

@@ -1263,8 +1264,10 @@ unsigned MachineInstr::findTiedOperandIdx(unsigned OpIdx) const {
12631264
/// clearKillInfo - Clears kill flags on all operands.
12641265
///
12651266
void MachineInstr::clearKillInfo() {
1266-
for (MachineOperand &MO : all_uses())
1267-
MO.setIsKill(false);
1267+
for (MachineOperand &MO : operands()) {
1268+
if (MO.isReg() && MO.isUse())
1269+
MO.setIsKill(false);
1270+
}
12681271
}
12691272

12701273
void MachineInstr::substituteRegister(Register FromReg, Register ToReg,
@@ -1546,9 +1549,12 @@ bool MachineInstr::isLoadFoldBarrier() const {
15461549
/// allDefsAreDead - Return true if all the defs of this instruction are dead.
15471550
///
15481551
bool MachineInstr::allDefsAreDead() const {
1549-
for (const MachineOperand &MO : all_defs())
1552+
for (const MachineOperand &MO : operands()) {
1553+
if (!MO.isReg() || MO.isUse())
1554+
continue;
15501555
if (!MO.isDead())
15511556
return false;
1557+
}
15521558
return true;
15531559
}
15541560

@@ -2057,8 +2063,8 @@ void MachineInstr::clearRegisterKills(Register Reg,
20572063
const TargetRegisterInfo *RegInfo) {
20582064
if (!Reg.isPhysical())
20592065
RegInfo = nullptr;
2060-
for (MachineOperand &MO : all_uses()) {
2061-
if (!MO.isKill())
2066+
for (MachineOperand &MO : operands()) {
2067+
if (!MO.isReg() || !MO.isUse() || !MO.isKill())
20622068
continue;
20632069
Register OpReg = MO.getReg();
20642070
if ((RegInfo && RegInfo->regsOverlap(Reg, OpReg)) || Reg == OpReg)

llvm/lib/CodeGen/RegAllocFast.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1563,7 +1563,9 @@ void RegAllocFastImpl::allocateInstruction(MachineInstr &MI) {
15631563
bool ReArrangedImplicitMOs = true;
15641564
while (ReArrangedImplicitMOs) {
15651565
ReArrangedImplicitMOs = false;
1566-
for (MachineOperand &MO : MI.all_uses()) {
1566+
for (MachineOperand &MO : MI.operands()) {
1567+
if (!MO.isReg() || !MO.isUse())
1568+
continue;
15671569
Register Reg = MO.getReg();
15681570
if (!Reg.isVirtual() || !shouldAllocateRegister(Reg))
15691571
continue;

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