@@ -43375,8 +43375,9 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
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}
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case X86ISD::VSHLI: {
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SDValue Op0 = Op.getOperand(0);
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+ SDValue Op1 = Op.getOperand(1);
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- unsigned ShAmt = Op.getConstantOperandVal(1 );
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+ unsigned ShAmt = Op1->getAsZExtVal( );
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if (ShAmt >= BitWidth)
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break;
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@@ -43420,14 +43421,17 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
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return false;
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}
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case X86ISD::VSRLI: {
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- unsigned ShAmt = Op.getConstantOperandVal(1);
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+ SDValue Op0 = Op.getOperand(0);
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+ SDValue Op1 = Op.getOperand(1);
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+
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+ unsigned ShAmt = Op1->getAsZExtVal();
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if (ShAmt >= BitWidth)
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break;
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APInt DemandedMask = OriginalDemandedBits << ShAmt;
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- if (SimplifyDemandedBits(Op.getOperand(0) , DemandedMask,
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- OriginalDemandedElts, Known, TLO, Depth + 1))
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+ if (SimplifyDemandedBits(Op0 , DemandedMask, OriginalDemandedElts, Known ,
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+ TLO, Depth + 1))
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return true;
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Known.Zero.lshrInPlace(ShAmt);
@@ -43452,8 +43456,7 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(
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return TLO.CombineTo(Op, Op0);
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// fold (VSRAI (VSHLI X, C1), C1) --> X iff NumSignBits(X) > C1
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- if (Op0.getOpcode() == X86ISD::VSHLI &&
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- Op.getOperand(1) == Op0.getOperand(1)) {
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+ if (Op0.getOpcode() == X86ISD::VSHLI && Op1 == Op0.getOperand(1)) {
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SDValue Op00 = Op0.getOperand(0);
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unsigned NumSignBits =
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TLO.DAG.ComputeNumSignBits(Op00, OriginalDemandedElts);
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